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Job Description:
Education: BSEE or above
Experience:
BSEE with 3+ years related experience required
Requirements:
Deep understanding of digital circuit/layout design.
Familiar with popular circuit/layout design tool, simulation and verification tool.
Strong Skill/Perl/Tcl scripting ability
Self-motivated with good communication skills, quick learner and teamworker.
Description of Function & Responsibility
:
Responsible for stdcell and digital IP circuit/layout design, simulation and verification.
截止4/12/2016，火速投简历吧！！！
francesco_li@hotmail.com |
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eetop公众号
创芯大讲堂
创芯人才网
发表于 2016-4-7 15:24:04
