insert_dft
Warning: The following synthetic libraries should be added to
the list of link libraries:
'dw_foundation.sldb'. (UISN-26)
Error: DFT insertion isn't supported on designs with unmapped cells. (TEST-269)
Information: Scan routing is not complete. Signals 'serial or scan_enables' need to be routed. (TEST-899)
Information: DFT insertion was not successful. There were unrecoverable processing errors. (TEST-211)
0
看起来不行:insert_dft Warning: Main library 'dw_foundation.sldb' has no time units specified, but library 'ua11lscep15bdrll_135c125_wc' does. (TIM-107) Warning: Main library 'dw_foundation.sldb' has no capacitance units specified, but library 'ua11lscep15bdrll_135c125_wc' does. (TIM-108) Warning: The trip points for the library named ua11lscep15bdrll_135c125_wc differ from those in the library named dw_foundation.sldb. (TIM-164) Error: DFT insertion isn't supported on designs with unmapped cells. (TEST-269) Information: Scan routing is not complete. Signals 'serial or scan_enables' need to be routed. (TEST-899) Information: DFT insertion was not successful. There were unrecoverable processing errors. (TEST-211) 0
dc_shell> source read_ddc.tcl ... Reading ddc file 'ATM_TOP.ddc'. Information: Checking out the license 'DesignWare'. (SEC-104) Loaded 32 designs. Current design is 'ATM_TOP'. ... dc_shell> insert_dft Routing Clock gating cells Information: Routing clock gating cell test pins with no specified driver to scan enable 'TEST_SE' Warning: Protocol generated after insertion in Internal Pins Flow is not accurate and can not be used. (TESTXG-53) 1