|
马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。
您需要 登录 才可以下载或查看,没有账号?注册
x
第一个程序:
module KEY (
// inputs:
clk,
rst,
PSW,
LED
);
//===========================================================================
// PORT declarations
//===========================================================================
input clk;
input rst;
input [3:0] PSW;
output [3:0] LED;
//reg [15:0] timer1;
//reg [3:0] PSW_Status1;
//reg [3:0] PSW_Status2;
reg [3:0] PSW_OUT;
always @(posedge clk or posedge rst)
begin
if (rst)
begin
PSW_OUT <= 4'b0000;
end
else
begin
PSW_OUT <= PSW;
end
end
assign LED = PSW_OUT;
endmodule
第二个程序:
module KEY (
// inputs:
clk,
rst,
PSW,
LED
);
//===========================================================================
// PORT declarations
//===========================================================================
input clk;
input rst;
input [3:0] PSW;
output [3:0] LED;
reg [15:0] timer1;
reg [3:0] PSW_Status1;
reg [3:0] PSW_Status2;
reg [3:0] PSW_OUT;
always @(posedge clk or posedge rst)
begin
if (rst)
begin
PSW_Status1 <= 4'b0000;
PSW_Status2 <= 4'b0000;
end
else
begin
PSW_Status1 <= PSW;
PSW_Status2 <= PSW_Status1;
end
end
always @(posedge clk or posedge rst)
begin
if (rst)
timer1 <= 16'b0;
else if (PSW_Status1[0] & ~PSW_Status2[0]) //rising edge detect
timer1 <= 16'b0;
else if (~PSW_Status1[0] & PSW_Status2[0]) //falling edge detect
timer1 <= 16'b0;
else if (timer1 != 50000)
timer1 <= timer1 + 1;
end
always @(posedge clk or posedge rst)
begin
if (rst)
PSW_OUT <= 0;
else if (PSW_Status1[0] & ~PSW_Status2[0]) //keep when rising edge
PSW_OUT <= PSW_OUT;
else if (PSW_Status1[0] & PSW_Status2[0]) //keep when failing edge
PSW_OUT <= PSW_OUT;
else if(timer1 == 50000)
PSW_OUT <= PSW;
end
assign LED = PSW_OUT;
endmodule
四个按键控制四个灯亮灭,都能实现功能,第二个程序优点是啥? |
|