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High-Performance RF Mixer and Operational Amplifier BiCMOS Circuits Using Parasitic Vertical Bipolar Transistor in CMOS Technology
Abstract—The electrical characteristics of the parasitic vertical
NPN (V-NPN) BJT available in deep n-well 0.18- m CMOS
technology are presented. It has about 20 of current gain, 7 V
of collector-emitter breakdown voltage, 20 V of collector-base
breakdown voltage, 40 V of Early voltage, about 2 GHz of cutoff
frequency, and about 4 GHz of maximum oscillation frequency at
room temperature. The corner frequency of 1 noise is lower
than 4 kHz at 0.5 mA of collector current. The double-balanced
RF mixer using V-NPN shows almost free 1 noise as well as
an order of magnitude smaller dc offset compared with CMOS
circuit and 12 dB flat gain almost up to the cutoff frequency.
The V-NPN operational amplifier for baseband analog circuits
has higher voltage gain and better input noise and input offset
performance than the CMOS ones at the identical current. These
circuits using V-NPN provide the possibility of high-performance
direct conversion receiver implementation in CMOS technology.
Index Terms—BiCMOS, deep n-well CMOS, direct conversion
receiver, offset, operational amplifier, parasitic vertical bipolar
transistor, RF mixer, 1 noise.
[ 本帖最后由 lingzhi 于 2007-5-21 10:23 编辑 ] |
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