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简历发 FlowerSeu@163.com
应届生勿投,以免浪费时间,谢谢
We are a Shanghai/SiliconValley based stealth-mode semiconductor startup,
andbacked by the world’s leading venture capital firm for hardware. Our
returnee founders are successful entrepreneurs with backgrounds from
Stanford, Fudan, Intel, LSI, and nVidia. They have been collectively
involved in six successful startups, with their last IC startup in Shanghai
previously acquired for 200+ mil-RMB.
Our company culture is like a Silicon-Valley style startup, with a unique
USA/ Chinese-blend of lifestyle and innovation. Our vision is to learn,
challenge, and grow together, creating exponential value for our customers,
ourselves, and our company.
We're looking for capable and passionate candidates to join us in the
following open positions:
[1] Optoelectronics IC Design Engineer
[2] Analog / Mixed-Signal IC Design Engineer
[3] Digital / SoC Design Engineer
[4] Mixed-Signal Layout Engineer
[5] FAE / Product Engineer
[6] Embedded Systems / Applications Engineer
[7] HR / Office Manager
------------------------------------------------------------
[1] Optoelectronics IC Design Engineer (Junior, Senior)
Salary: Competitive salary with generous stock options
Commensurate with experience/skill
Job description:
- This position is for an analog design engineer supporting next-generation
mixed-signal optoelectronics SoCs.
- Design and R&D of optoelectronic front-ends, including: TIAs, Limiting Amp,
Laser Diode Drivers, VCSEL Drivers,
for a variety of optical components (PIN, APD, VCSEL, LASER, MZI, etc).
- Use EDA tools (Cadence, Mentor) to run simulation and function
verification.
- Guide layout engineer to optimize layout.
- Chip debug and testing individually.
- Design and optimize chip layout.
Qualifications:
- Minimum 2 years experience in mixed-signal circuit design with MSEE in IC
design.
- Experience with SERDES transmitter/receiver, TIA, CDR, LNA, Equalizer, etc.
is highly preferred.
- Experience with Cadence EDA tools.
- Team player with good communication skills.
------------------------------------------------------------
[2] Analog / Mixed-Signal Design Engineer (Junior, Senior)
Salary: Competitive salary with generous stock options
Commensurate with experience/skill
Job Description:
- You will perform analog and mixed signal design, characterization and
evaluation of analog circuits such as:
high-speed amplifiers, wireline transmitters, PLL, or other baseband
circuits like LDO, temp sensor, ADC, Filters, etc.
- You will optimize the design of high-frequency (multi-gigahertz) and high-
precision analog circuits.
- Use EDA tools (Cadence, Mentor) to run simulation and function
verification.
- Guide layout engineer to optimize layout.
- Chip debug and testing individually.
- Design and optimize chip layout.
Qualifications:
- MSEE in analog IC design with 2 years experience.
- Experience in Cadence EDA tools.
- Team player with good communication skills.
- Experience with SERDES transmitter/receiver, TIA, CDR, LNA etc. is highly
preferred.
- Desired: Knowledge of advanced circuits such as PLLs, ADCs, DACs, LNAs,
drivers, NF, S-parameters, BW extension.
- Desired: Experience in RF circuit design, testing, and post-silicon bring-
up and evaluation.
------------------------------------------------------------
[3] Digital / SoC Design Engineer (Junior, Senior)
Salary: Competitive salary with generous stock options
Commensurate with experience/skill
Job description:
- This position is for a digital design engineer supporting mixed signal SoC
developments.
- RTL coding for logic models.
- Simulation/verification of functionalities at both module level and top
level.
- Module level synthesis / timing analysis / P&R.
- Design/verification and top-level function verification.
- Silicon debug of related model functionalities.
Qualifications:
- BSEE with minimum 3-year or MSEE with minimum 1-year experience of digital
experience.
- Experience on serial interface design (eg. SPI, I2C).
- Relevant experience in high-speed digital design (Flow: custom layout +
ASIC P&R flow) is a must.
- Solid knowledge of digital design building blocks.
- Strong skills of Verilog RTL coding, Place & Route, timing closure,
verification and debug.
- Hands on experience in EDA tools such as Cadence NC-Sim, Synopsys DC, PT,
etc.
- Desired: Closed-Loop Control Theory and Adaptation, Digital Filtering,
Mixed-Mode Simulations such as Verilog-A.
------------------------------------------------------------
[4] Layout Engineer (Junior, Senior)
Salary: Competitive salary with generous stock options
Commensurate with experience/skill
Job description:
- Individual will work closely with design engineers in the layout, physical
design and verification of analog and mixed signal ICs.
Qualifications:
- 2+ years experience with Cadence Virtuoso, Mentor Calibre, Synopsys.
- DRC, LVS, Metal Fill, Tapeouts, Metal Rules, Electromigration, Fringe Cap,
Via rules, Matching, Inductance noise, wire resistance.
- Basic understanding of IC design (RLC circuits and Kirchoff’s Law,
symmetry, frequency response, transistor matching).
- Desired: Analog layout design (differential symmetry; ground shielding;
high-frequency impedances; transistor parasitics).
------------------------------------------------------------
[5] FAE / Product Engineer (Junior, Senior)
Job description:
- The individual will interface with the customer, supporting the next-
generation SoC products into qualification
with the customer. The FAE engineer will provide quick feedback and rapid
debug of the product, solving problems
and answering questions the customer may have. Finally, this individual will
ascertain and determine next-generation
product requirements with the customer for future product refinements.
Qualifications:
- Bachelor's degree with minimum 2 years experience as FAC, IC designer, or
embedded systems engineer.
- Must be willing travel to customer site 33% of time (i.e. Wuhan, Suzhou),
to support the customer.
- Can read system datasheets, understand, and debug interactions between
different blocks.
- Desired: previous experience with basic IC design and PCB prototyping.
- Desired: High-level system programming, such as C/C++, python/Perl,
LabView, Matlab
- Desired: Lab experience using oscilloscopes, signal/pattern generators,
power supplies, etc.
------------------------------------------------------------
[6] Embedded Systems / Applications Engineer (Junior, Senior)
Job description:
- The individual will design customer evaluation PCB prototypes/demos,
incorporating our next-generation SoCs.
Qualifications:
- Bachelor's degree with minimum 2 years experience with embedded systems and
PCB design.
- Experience with embedded systems coding, such as: MCU programming (ARM,
MSP430, 8051, etc) in C/C++.
- Expert in scripting and coding automation (i.e. Python, Perl)
- Experience with Verilog system coding, in regards to FPGA implementation
and system bring-up.
- Experience with PCB layout, design, manufacturing, assembly, bring-up, and
debug.
- Good understanding of power supply noise, high-speed microwave coupling and
noise effects, and packaging trade-offs.
- Desired: Knowledge of IC design methodology.
------------------------------------------------------------
[7] HR / Office Manager
Job description:
- The individual will administratively support the company in a variety of
ways to help the company succeed, including:
buying office materials, helping organize the HR recruiting process, writing
proposals, manage customer interactions, etc.
Qualifications:
- Bachelor's degree with minimum 2 years experience in HR/office manager
role.
- Friendly outgoing person, who is always willing to learn, help, and take on
new job tasks/roles.
- Very organized, who is excellent with spreadsheets, note taking, and
managing a calendar. |
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