On-chip high voltage charge pump in

ohyoung · 发表于 2007-4-11 21:47:11

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An on-chip high voltage tolerant 4VDD charge pump with symmetrical architecture in a standard low voltage 1.8 V 0.18 mm CMOS
process is presented. For a 250 kO load, circuit efficiency of the charge pump is approximately 71%. All the MOS transistors satisfy typical voltage stress related reliability requirements for standard low voltage CMOS devices.

liuzhieetop · 发表于 2007-9-29 20:59:50

jimfly · 发表于 2007-12-21 11:54:51

THANKS

teradyne · 发表于 2007-12-23 20:56:35

On-chip high voltage charge pump in

buel · 发表于 2008-7-23 13:38:48

多谢多谢

eleven7up · 发表于 2008-8-20 00:39:24

太棒了
正好需要0.18um的charge pump參考資料
謝謝

finerain · 发表于 2008-11-8 17:45:47

Thanks for sharing!

finerain · 发表于 2008-11-8 17:48:33

Do you have anything book or papers on the dynamic analysis of charge pumps!
How to calculate the rising time and power consumption?

笑麒麟 · 发表于 2008-12-1 11:47:43

多个电压的吗?

ohyoung · 发表于 2008-12-20 22:00:32

原帖由 finerain 于 2008-11-8 17:48 发表

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Do you have anything book or papers on the dynamic analysis of charge pumps!
How to calculate the rising time and power consumption?

It is a pity，my work focus mainly on the leakage reducdency of charge pump,。
And all my research was finished one year ago

On-chip high voltage charge pump in

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