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出自于外国著名 The Designers Guide Community 的white paper
PLLnoise+jitter.pdf
(698.79 KB, 下载次数: 602 )
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Two methodologies are presented for predicting the phase noise and jitter of a PLL-
based frequency synthesizer using simulation that are both accurate and efficient. The
methodologies begin by characterizing the noise behavior of the blocks that make up the
PLL using transistor-level RF simulation. For each block, the phase noise or jitter is
extracted and applied to a model for the entire PLL. |
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