全差分运放输入问题？？？求大神

jake10000

1. open the feedback loop at high impedance node, normally at the gate;
2. connect the opened feedback node and gate with large inductor (1G), or large ideal R to establish DC bias from feedback loop and block high frequency;
3. Add a large Capacitor between gate and a new node, stimulate this new node with AC voltage source. Large AC cap block DC and allow AC signal to pass through without disturb the DC bias condition.

frankduoduo

很专业，我早忘记怎么算了

uponklp

全差分运放开环仿真输入信号两边都加，两边的直流相同，即共模电压一样，AC交流小信号两边幅度都为0.5V，相位正向端为0，反相端为180，这样差模信号为1V。
闭环仿真负反馈端不需要加共模。

tangyuxiang

学习了!!!