菜鸟求教，第一次用verilog hdl编程，出了点问题

chz100

Info: *******************************************************************
Info: Running Quartus II 64-Bit Analysis & Synthesis

Info: Version 11.0 Build 157 04/27/2011 SJ Full Version

Info: Processing started: Sun Jan 11 10:56:12 2015
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off phrase -c phrase
Info: Parallel compilation is enabled and will use 2 of the 2 processors detected
Error (10839): Verilog HDL error at phrase.v(3): declaring global objects is a SystemVerilog feature
Error (10170): Verilog HDL syntax error at phrase.v(8) near text "input";  expecting ";"
Info: Found 0 design units, including 0 entities, in source file c:/users/1169294388/desktop/phrase.v
Error: Quartus II 64-Bit Analysis & Synthesis was unsuccessful. 2 errors, 0 warnings

Error: Peak virtual memory: 373 megabytes

Error: Processing ended: Sun Jan 11 10:56:17 2015

Error: Elapsed time: 00:00:05

Error: Total CPU time (on all processors): 00:00:01
Error: Quartus II Full Compilation was unsuccessful. 4 errors, 0 warnings


程序如下

//stan 基准数字信号，tob待测数字信号，clk时钟信号，outs输出相位

parameter N=9,M=20;//2^8<360,2^9>360；20bit

module phrase(stan,tob,clk,outs)

//变量


input stan,tob,clk;

output [N:1] outs;

reg [N:1] outs;

wire c0,c1,c2,c3;//c0是基准数字信号与待测数字信号异或的结果,c1是c0与时钟信号与的结果,c2是基准信号二分频的结果,c3是c2与clk与的结果，用来测基准信号相对于clk的时间周期

reg [20:1] count1,count2,cont1,cont2;//count1是测基准信号时间的，count2是测c0的高电平时间的



count1=0;

count2=0;



//实现异或

assign c0=((!stan)&&tob)||(stan&&(!tob));

//

assign c1=c0&&clk;

//

always@(posedge stan)

begin

assign c2=!c2;

end

assign c3=c2&&clk;



//测c0高电平时间
和测c3高电平时间

always@(posedge c1 or posedge c3)

begin

if(c1)

{

count2=count2+1;

}

if(c3)

{

count1=count1+1;

}


end

always@(negedge c0 or negedge c2)

begin

#2 if(!c0)

{

cont2=count2;

count2=0;

}

#2 if(!c2)

{

cont1=count1;

count1=0;

outs=cont2/cont1;

display("现在的相位是=%0d度",outs);

}

end
endmodule

syncom

改一下,再試看看:
//stan 基准数字信号，tob待测数字信号，clk时钟信号，outs输出相位


module phrase(stan,tob,clk,outs);

parameter N=9,M=20;//2^8<360,2^9>360；20bit

//变量
祝好運!