看关于floorplaning的文档，有一句话帮我翻译一下（粗体）。

zhuyuefeng2009

Floorplanning can reduce the route delay in a critical path. You can:
• Identify logic that is contributing to timing problems.
• Guide the place and route software to keep the logic close together.
The goal is to improve the timing of the critical paths by reducing the amount of route delay.
Floorplanning does not change the logic that makes up the critical path. You must guide the
synthesis software to structure the gates to support the floorplan.
If most of the delay in the critical path comes from logic delay, re-synthesizing the design may bring
larger gains than floorplanning.
During floorplanning, you may discover other issues  that might benefit from re-synthesis. Designers
often replicate registers  to stay local to clusters of dispersed loads.

jun_dahai

设计者常常复制寄存器到局部分散的负载群
文中简短说明了，为了优化关键路径，可以使用的手段

zhuyuefeng2009

回复 2# jun_dahai

这句话啥意思啊？为什么要复制寄存器，我只知道在寄存器扇出大的时候要复制寄存器。。

jun_dahai

回复 3# zhuyuefeng2009


    优化关键路径，改善时序关系

raojp

回复 1# zhuyuefeng2009
引申一下就是说：当寄存器的扇出很大时（可能就会很分散），设计者常常复制寄存器，以保证对于这些分散的负载来说，都是由离得很近的寄存器来驱动，而不是由绕来绕去的布线，这样就能从而保证时序的确定性（在亚微米/深亚微米工艺中，绕线延迟占总延迟的绝大部分）。