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终端信息如下:
[lusong@lusong parta]$ vcs add4.v add8.v addertb.v fa.v
Chronologic VCS (TM)
Version H-2013.06 -- Sat Nov 1 06:10:28 2014
Copyright (c) 1991-2013 by Synopsys Inc.
ALL RIGHTS RESERVED
This program is proprietary and confidential information of Synopsys Inc.
and may be used and disclosed only as authorized in a license agreement
controlling such use and disclosure.
Parsing design file 'add4.v'
Parsing design file 'add8.v'
Parsing design file 'addertb.v'
Parsing design file 'fa.v'
Top Level Modules:
addertb
No TimeScale specified
Starting vcs inline pass...
1 module and 0 UDP read.
However, due to incremental compilation, no re-compilation is necessary.
ld -r -m elf_i386 -o pre_vcsobj_1_1.o --whole-archive pre_vcsobj_1_1.a --no-whole-archive
if [ -x ../simv ]; then chmod -x ../simv; fi
g++ -o ../simv -melf_i386 -Wl,-whole-archive -Wl,-no-whole-archive SIM_l.o 5NrI_d.o 5NrIB_d.o pre_vcsobj_1_1.o rmapats_mop.o rmapats.o /home/lusong/synopsys/vcs201306/linux/lib/libzerosoft_rt_stubs.so /home/lusong/synopsys/vcs201306/linux/lib/libvirsim.so /home/lusong/synopsys/vcs201306/linux/lib/librterrorinf.so /home/lusong/synopsys/vcs201306/linux/lib/libsnpsmalloc.so /home/lusong/synopsys/vcs201306/linux/lib/libvcsnew.so /home/lusong/synopsys/vcs201306/linux/lib/libvcsucli.so /home/lusong/synopsys/vcs201306/linux/lib/libuclinative.so /home/lusong/synopsys/vcs201306/linux/lib/vcs_save_restore_new.o /home/lusong/synopsys/vcs201306/linux/lib/ctype-stubs_32.a -ldl -lc -lm -lpthread -ldl
../simv up to date
CPU time: 3.341 seconds to compile + .041 seconds to elab + .177 seconds to link
不知到错误出在什么地方,还请各位多多指教 |
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