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想请问一下,我在pre-place之前把除了,时钟网络之外的其他high-fanout网络的ideal属性都去掉了,并且将VDD与GND,和tie-high tie-low都连了对应的net上面derive_pg_connection -power_net VDD -power_pin VDD -ground_net GND -ground_pin GND -tie
derive_pg_connection -power_net VDD -power_pin VDD -ground_net GND -ground_pin GND -verbose
为什么placement之后会出现两条high-fanout net
Net Fanout Attributes Capacitance Driver
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image_smici/CLK_100M
20896 dr, d, I, h 0.00 image_smici/plltop/clkcore
image_smici/IMAGE/convolution/net41826
36350 h 1031.10 image_smici/IMAGE/convolution/*cell*5989/**logic_0**
image_smici/IMAGE/W_R_SRAM/net41827
1566 h 1031.10 image_smici/IMAGE/W_R_SRAM/*cell*5990/**logic_0**
我单独create_buffer_tree,仍然没有任何效果,不知道是不是时序约束过紧的问题???? |
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