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1.A low power 20 GHz comparator in 90 nm COMS technology 唐凯 孟桥 王志功 郭婷
参考链接1:http://www.cnki.com.cn/Article/CJFDTotal-BDTX201405016.htm
参考链接2:http://iopscience.iop.org/1674-4926/35/5/055002/pdf/1674-4926_35_5_055002.pdf
2.A 8GHz Differential Comparator for Ultra High Speed ADC in 90nm CMOS Technology
参考链接:http://www.scientific.net/AMM.513-517.4572
3.A low-power reduced kick-back comparator with improved calibration for high-speed flash ADCs
详细资料:Torfs, Guy (Department of Information Technology, Ghent University, Belgium); Li, Zhisheng; Bauwelinck, Johan; Yin, Xin; Vandewege, Jan; Van Der Plas, Geert Source: IEICE Transactions on Electronics, v E92-C, n 10, p 1328-1330, 2009
4.Design and analysis of novel dynamic latched comparator with reduced kickback noise for high-speed ADCs
详细资料:Yan, Huang (Microelectronics Department, Brandenburg University of Technology, Cottbus, Germany); Schleifer, Horst; Killat, Dirk Source: 2013 European Conference on Circuit Theory and Design, ECCTD 2013 - Proceedings, 2013, 2013 European Conference on Circuit Theory and Design, ECCTD 2013 - Proceedings
谢谢了! |
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