在线咨询
eetop公众号 创芯大讲堂 创芯人才网
切换到宽版

EETOP 创芯网论坛 (原名:电子顶级开发网)

手机号码,快捷登录

手机号码,快捷登录

找回密码

  登录   注册  

快捷导航
搜帖子
查看: 1774|回复: 0

[招聘] 上海 analog PHY or serdes 职位

[复制链接]
发表于 2014-8-5 13:46:29 | 显示全部楼层 |阅读模式

马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。

您需要 登录 才可以下载或查看,没有账号?注册

x
JD - Principal/Senior Engineer of Analog PHY or SerDes IC Design

Job Description:

1.Responsible for the design and development of PHY or SerDes analog/mixed signal IC circuit blocks from initial concept and specification through final verification and conformance to customer requirements.
2.Candidate’s background should demonstrate good problem solving skills, excellent analog aptitude, good communication skills, and ability to work cooperatively in a team environment.  
3.Must have demonstrated experience in analog PHY or SerDes transceiver designs including some of the following circuit blocks: System level modeling by matlab, C, or VerilogA; Driver; Receiver; Serializer; Deserializer; Phase Interpolator; Low jitter PLL; High Speed Clock Distribution; Bias and Bandgap; Voltage Regulators.
4.Candidate should have working knowledge of a set of common SerDes standards and their electrical requirements, and a thorough understanding of jitter.
5.Position requires proficiency in using CAD tools for circuit simulation, layout, and physical verification (Cadence tool experience, lab test experience, and experience at 40nm and below technologies are a plus).  

Position Requirements:
☞ Master qualifed industry experience for at least 10 years & performed core role in this field.
1.Master or PHD (prefer) degree, major in Micro-Electronics, Electronic Engineering or equivalent
2.Ability to work effectively alone or as well as in a team.
3.Essential that the individual demonstrates strong communication, verbal and written
4.Requires good communication skills in English.
5.Industry Experience for at least 8 years or more for analogy PHY or SerDes and High Speed silicon mass products


Desirable Qualifications:
☞ Analog PHY means both SerDes(for connecting one-connect) & HDMI PHY, DP (Display port) PHY solutions.

1.Knowledge of one of key SerDes Analog IC design areas and their architectures/applications:
2.Clock Data Recovery; PLL's; Oscillators; Low Noise Design; RF IC building blocks
3.Solid understanding of IC design technology and process/methodology in IC design solutions
4.Familiar with Cadence analog and mixed-signal EDA tools is a plus


有兴趣可以发简历到hamy-wang@kthr.com,或者加Q:1349541957 详细咨询
您需要登录后才可以回帖 登录 | 注册

本版积分规则

关闭

站长推荐 上一条 /1 下一条

小黑屋| 手机版| 关于我们| 联系我们| 在线咨询| 隐私声明| EETOP 创芯网
( 京ICP备:10050787号 京公网安备:11010502037710 )

GMT+8, 2024-11-18 04:30 , Processed in 0.013180 second(s), 6 queries , Gzip On, Redis On.

eetop公众号 创芯大讲堂 创芯人才网
快速回复 返回顶部 返回列表