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A high yield 12-bit 250-MS/s CMOS D/A converter
J. Bastos
M. Steyaert
W. Sansen
ESAT, Katholieke Univ., Leuven
DOI: 10.1109/CICC.1996.510591 In proceeding of: Custom Integrated Circuits Conference, 1996., Proceedings of the IEEE 1996Source: IEEE Xplore
ABSTRACT A 12-bit linearity binary-weighted all MOS transistor D/A
converter is presented. Experimental results demonstrate the feasibility
of fabricating with high yield such a converter in a standard CMOS 0.7
μm technology. The output drives a doubly terminated 50 Ω
coaxial cable. The full scale 10-90% rise/fall time is 4 ns. The active
chip area is 1 mm2
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发表于 2014-8-4 11:07:27
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