每日一奖----20140528

damonzhao

Q17. What is SDC constraint file contains?

zzvbk

1.clock period  &wave form
2.false path
3.input output delay
4.input drive,output load
5.uncertainty
6.disable timing

jinwei91

Agree with "zzvbk".

Also, max_transition, max/min delay, multicycle path, etc. are included. All the timing constraints and specification of the design are included in the sdc files.

jtianen

SDC:Full form of SDC: Synopsys Design Constraints
SDC is a format used to specify design intent, which is including timing, power and area constraints for a design. SDC is tcl based. DC ICC and Primetime use SDC file.