如何搭建SoC项目的基本Testbench（我的流程）

newwalkman

没做过SOC,直接阅读楼主的总结还是感觉有些困难

hymeng98

做验证半年了额，再来看，很多东西豁然明了。。

bingo426

刚入门，慢慢研究！

stephendong

不错，赞一个

开不了口8099

写的挺好的，向楼主学习。

开不了口8099

去年研究过SOC的仿真问题，但思路一直不是很清晰，楼主有没有使用过RAL-C-Interface这种方法？
按照Synopsys的说法是可以不需要ISS的，我把原话copy过来。
The RAL C interface allows firmwareand application-level code to be developed and debugged on a simulation of the design. For
runtime performance reasons, only the lower layers of an application are simulated.
You can access the fields, registers, and memories included in a RAL model in C code through a C API. The C code is executed
natively on the same workstation that is running the SystemVerilog simulation, eliminating the need for an instruction set simulator or a
RTL model of the processor. You can compile the same C code later for the target execution processor.

hfyfpga

mark一下啊，不错的经验笔记

yqnie

谢谢分享

liuxr

好东西，赞一下，先收藏了，了解一下~

大龙猫

。。。。。。。。。。。。。。。。。