VCS+verdi debug,VCS编译无法通过

ICSYS

make : *** [product timestamp] Error 1
make exited with status 2
求大牛指点~~
===========================================
版本是VCS201103，verdi2011.想调用VERDI里面有很多vcs,vcsd,vcs_latest,vcs_mixed,vcs_miph..诸多版本.应选哪个呢？指定PLI时有debussy.tab,novas.tab.verdi.tab.fsdb_vcs.tab.fsdb_vcs.a.pli.a等.tab,.a文件，应选择哪个呢？谢谢啦~===========================================
以上版本和pli.a .tab都试过了，都不行

ICSYS

compile log as follows.

*design* DebussyLib (btIdent 2011.04)
Command arguments:
    +define+verilog
    -inc
    /home/hu/test/sim/tb/dut.v
    /home/hu/test/sim/tb/uvm_tb_top2.v


*Error* File type not allowed for object.
"/home/hu/test/sim/tb/uvm_tb_top2.v", 1:
*Error*  syntax error (expecting keyword 'module', 'macromodule' or 'primitive')
"/home/hu/test/sim/tb/uvm_tb_top2.v", 2: import uvm_pkg:<-
*Error*  syntax error (expecting keyword 'module', 'macromodule' or 'primitive')
"/home/hu/test/sim/tb/uvm_tb_top2.v", 2: import uvm_pkg:<-
*Error*  Resource file error (expecting keyword 'module', 'macromodule' or 'primitive')
"/home/hu/test/sim/tb/uvm_tb_top2.v", 11: interface my_if(input<-
*Error*  syntax error (expecting keyword 'module', 'macromodule' or 'primitive')
"/home/hu/test/sim/tb/uvm_tb_top2.v", 13: logic [7:0] rxd<-
*Error*  syntax error (expecting keyword 'module', 'macromodule' or 'primitive')
"/home/hu/test/sim/tb/uvm_tb_top2.v", 14: logic       rx_dv;<-
*Error*  syntax error (expecting keyword 'module', 'macromodule' or 'primitive')
"/home/hu/test/sim/tb/uvm_tb_top2.v", 15: logic [7:0] txd<-
*Error*  syntax error (expecting keyword 'module', 'macromodule' or 'primitive')
"/home/hu/test/sim/tb/uvm_tb_top2.v", 16: logic       tx_en;<-
*Error*  syntax error (expecting keyword 'module', 'macromodule' or 'primitive')
"/home/hu/test/sim/tb/uvm_tb_top2.v", 18: clocking drv_cb@<-
*Error*  syntax error (expecting keyword 'module', 'macromodule' or 'primitive')
"/home/hu/test/sim/tb/uvm_tb_top2.v", 18: clocking drv_cb@<-
*Error*  syntax error (expecting keyword 'module', 'macromodule' or 'primitive')
"/home/hu/test/sim/tb/uvm_tb_top2.v", 22: clocking mon_cb<-
*Error*  syntax error (expecting keyword 'module', 'macromodule' or 'primitive')
"/home/hu/test/sim/tb/uvm_tb_top2.v", 22: clocking mon_cb<-
*Error*  Resource file error (expecting keyword 'module', 'macromodule' or 'primitive')
"/home/hu/test/sim/tb/uvm_tb_top2.v", 36: module<-
*Error*  Resource file error (expecting keyword 'module', 'macromodule' or 'primitive')
"/home/hu/test/sim/tb/uvm_tb_top2.v", 36: module<-
*Error*  Resource file error (expecting keyword 'module', 'macromodule' or 'primitive')
"/home/hu/test/sim/tb/uvm_tb_top2.v", 50: initial<-
*Error*  Resource file error (expecting keyword 'module', 'macromodule' or 'primitive')
"/home/hu/test/sim/tb/uvm_tb_top2.v", 56: end<-
*Error*  syntax error (expecting keyword 'module', 'macromodule' or 'primitive')
"/home/hu/test/sim/tb/uvm_tb_top2.v", 59: uvm_config_db#(virtual my_if<-
*Error*  syntax error (expecting keyword 'module', 'macromodule' or 'primitive')
"/home/hu/test/sim/tb/uvm_tb_top2.v", 62: uvm_config_db#(virtual my_if<-
*Error*  Resource file error (expecting keyword 'module', 'macromodule' or 'primitive')
"/home/hu/test/sim/tb/uvm_tb_top2.v", 65: end<-
*Error*  Resource file error (expecting keyword 'module', 'macromodule' or 'primitive')
"/home/hu/test/sim/tb/uvm_tb_top2.v", 72: end<-
*Error*  Resource file error (expecting keyword 'module', 'macromodule' or 'primitive')
"/home/hu/test/sim/tb/uvm_tb_top2.v", 88: class my_transaction extends<-

*Error* Resource file error

Total        21 error(s),   0 warning(s)

seabeam

看样子lz用的UVM1.1应用指南及源代码分析里的例子

ICSYS

回复 3# seabeam

有什么解决方案吗，还有verdi里的PLI中VCS的多个版本 VCS,VCSD,MIXED,MHPI等等，不晓得是选哪个，我本人使用VCS201103版

ICSYS

求大牛啊~~~~~~~

Reals_JIANG

-P  ***/novas/verdi***/share/PLI/vcs/LINUX/novas.tab
***/novas/verdi***/share/PLI/vcs/LINUX/pli.a

ICSYS

回复 6# Reals_JIANG


   试了。还是不行。

seabeam

没用过verdi,看上去是编译问题？你确定没有语法问题么？而且你可以度娘或者谷歌一下嘛。例如：http://bbs.eetop.cn/thread-315538-1-1.html

ICSYS

回复 8# seabeam


   确定没有语法问题。是PLI库问题。你给的链接我看了一下，应该不是那个帖子相似的问题，谢谢

rockyli

请LZ贴一下Makefile和compile的命令行？