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楼主: Apenper

[讨论] 设计的折叠共源共栅vds>vgs-vth却是线性区,vds<vdsat

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 楼主| 发表于 2013-12-21 11:24:57 | 显示全部楼层
回复 17# feynmancgz


    Actually,I don't know why shouldn't use the bias of the cascode,because of the resistance???if i put the mosfet instead of resistance?  and  can you give me some better solution of bias circuit. i  just imitate the book of Alen.
发表于 2013-12-21 15:43:05 | 显示全部楼层
回复 21# Apenper


   As I said, it's ok, but better not use it. Apparently, it's because of the resistor. matching, area, swing....many problems. if you do layout, you will find out that adding a resistor there looks very strange.    I didn't insist you to give up using this bias circuit, actually you can. I just don't like it according to my experiences.

    Sorry, I can give you some advice, point out the problems you may have, but I won't give you solutions directly.
 楼主| 发表于 2013-12-21 20:32:55 | 显示全部楼层
OK ,  I just try change the bias circuit
发表于 2014-3-13 14:55:42 | 显示全部楼层
有些乱阿....VDS>VDSAT ,,,保和。
发表于 2014-3-13 16:45:05 | 显示全部楼层
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