【全职】AMD上海招聘HW verification engineer

RecruiterAMD

AMD上海招聘资深工程师，请感兴趣的候选人务必以“所应聘职位_姓名_学历_专业_现公司

名称_工作年限”
为标题，把简历以附件形式发送到maggie1.zhang@amd.com ,请在正文称述应聘理由与优势。

Essential Functions:

• Development of infrastructure for verification of hardware in GFX IP.
• Develop verification environments for feature verification, and use the automated regression infrastructure setup for IP level and IP on SoC level functional verification.
• Low power design and verification for specific hardware functionality in Front-end.
• Improve the low power IP delivery for variant SoCs

Requirements/Qualifications:

• BS, MS or PhD in Electrical Engineering or Computer Science.
• 6+ years of ASIC verification or low power design experience
• Should have good understanding of Pre-Silicon design process from Architecture, Design, Synthesis and Gate level Implementation till Tapeout release.
• Advanced programming knowledge on Verilog/SystemVerilog, C/C++
• Requires demonstrated technical expertise in the areas of Design Verification and low power design/verification methodology.
• Knowledge on Perforce, OVL, SVA, SV, UVM, script programming etc.
• Should have excellent communication skills (both written and oral) and should be able to participate cross functional engineering teams geographically.
• Demonstrates leadership ability preferred.

Skills/Competencies:

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Good design verification experience

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Good communication

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Strong problem solving skills

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Low power design verification or computer graphics knowledge are plus

Desired:

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Team Lead experience

·
Design Verification experience