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microblaze FSL: MapLib:979 - LUT6 symbol

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发表于 2013-7-14 14:45:59 | 显示全部楼层 |阅读模式

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ISE 14.5,在ISE中添加microblaze,在EDK中使用两条FSL连接microblaze和自定义的IP核,edk中生成网表成功,但是在ISE中Map失败,错误如下:


ERROR:MapLib:979 - LUT6 symbol
"embed_cpu_i/fsl_v20_0/fsl_v20_0/Using_FIFO.Sync_FIFO_Gen.Use_Control.Sync_FI
FO_I1/FSL_Flag_Handle.Rd_Delay_For_Bram.fall_through_data_0_dpot" (output
signal=embed_cpu_i/fsl_v20_0/fsl_v20_0/Using_FIFO.Sync_FIFO_Gen.Use_Control.S
ync_FIFO_I1/FSL_Flag_Handle.Rd_Delay_For_Bram.fall_through_data_0_dpot) has
input signal "embed_cpu_i/fsl_v20_0_FSL_M_Control" which will be trimmed. See
Section 5 of the Map Report File for details about why the input signal will
become undriven.


ERROR:MapLib:978 - LUT6 symbol
"embed_cpu_i/fsl_v20_0/fsl_v20_0/Using_FIFO.Sync_FIFO_Gen.Use_Control.Sync_FI
FO_I1/FSL_Flag_Handle.Rd_Delay_For_Bram.fall_through_data_0_dpot" (output
signal=embed_cpu_i/fsl_v20_0/fsl_v20_0/Using_FIFO.Sync_FIFO_Gen.Use_Control.S
ync_FIFO_I1/FSL_Flag_Handle.Rd_Delay_For_Bram.fall_through_data_0_dpot) has
an equation that uses input pin I5, which no longer has a connected signal.
Please ensure that all the pins used in the equation for this LUT have
signals that are not trimmed (see Section 5 of the Map Report File for
details on which signals were trimmed).


求解决办法,谢谢!

发表于 2015-9-17 11:17:08 | 显示全部楼层
你好,我这边也遇到啦这个问题,请问你后来是怎么解决的?
发表于 2016-8-31 10:47:39 | 显示全部楼层
http://china.xilinx.com/support/answers/52789.html
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