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本帖最后由 whynoreason 于 2013-7-1 15:01 编辑
ICC运行结果（选择加floating ports选项）：多为全加器的进位端、寄存器的qn端，一些反相器的悬空端等ERROR : OUTPUT PortInst I5327/U1 N01(15970) in net I5327/S(16146) is floating.
ERROR : OUTPUT PortInst I6103/U2 N01(7749) in net I6103/S(8212) is floating.
** Total Floating ports are 128.
** Total Floating Nets are 0.
** Total OPEN Nets are 0.
** Total Electrical Equivalent Error are 0.
** Total Must Joint Error are 0.
不选择选项，直接运行verify_lvs，结果为没有错误：
** Total Floating ports are 0.
** Total Floating Nets are 0.
** Total SHORT Nets are 0.
** Total OPEN Nets are 0.
** Total Electrical Equivalent Error are 0.
** Total Must Joint Error are 0.
在calibre 做lvs死活做不过，PORT对应上了，造成的incorrect net有800多个，incorrect instance就更多了，3000多个。
目前我个人判断是floating ports引起的不对称，想请教下以下疑问：
1、ICC里头此类的floating ports应该是可以忽略的，不用care？
2、ICC 的verilog导出选项有何注意的地方？
3、v2lvs命令 ：v2lvs -v top.v -l cz6h+_std_floorplan.v -o top.spi -s CZ6H+_STD.spi -n -s0 GND -s1 VDD,有tie0,tie1,所以加-s0 GND -s1 VDD；有问题么？
4、calibre对此类floating ports的名字采样什么规则的呢？gds导入的悬空线 && v2lvs进来的悬空port/net，如何对应上呢？毕竟数量较多，如何才能匹配上呢？
5、calibre的哪项特殊选项需加上呢？个人认为应该只是在这做文章就OK了？
还请各位大神多帮帮忙，支支招。
Error: Different numbers of nets (see below).
Error: Different numbers of instances (see below).
Error: Connectivity errors.
Error: Property errors.
Warning: Ambiguity points were found and resolved arbitrarily.
layout CELL NAME: route
SOURCE CELL NAME: DG_TOP
--------------------------------------------------------------------------------------------------------------
INITIAL NUMBERS OF OBJECTS
--------------------------
Layout Source Component Type
------ ------ --------------
Ports: 188 188
Nets: 26957 25874 *
Instances: 32162 25476 * MN (4 pins)
31467 25421 * MP (4 pins)
0 1 * inv1_628 (2 pins)
------ ------
Total Inst: 63629 50898
NUMBERS OF OBJECTS AFTER TRANSFORMATION
---------------------------------------
Layout Source Component Type
------ ------ --------------
Ports: 188 188
Nets: 12686 12687 *
Instances: 846 849 * MN (4 pins)
1032 1016 * MP (4 pins)
0 1 * inv1_628 (2 pins)
24 24 AOI_3_1 (5 pins)
62 62 OAI_3_1 (5 pins)
77 55 * SDW3 (4 pins)
8 0 * SDW4 (5 pins)
52 32 * SUP3 (4 pins)
561 561 SPDW_2_1 (4 pins)
38 38 SPDW_2_1_1 (5 pins)
59 59 SPDW_2_2 (5 pins)
91 91 SPDW_2_2_1 (6 pins)
5 5 SPDW_2_2_2 (7 pins)
32 32 SPDW_3_2 (6 pins)
233 233 SPUP_2_1 (4 pins)
29 29 SPUP_2_1_1 (5 pins)
431 431 SPUP_2_2 (5 pins)
49 49 SPUP_2_2_1 (6 pins)
72 72 SPUP_2_2_2 (7 pins)
54 54 SPUP_3_2 (6 pins)
24 24 _bitcorev (4 pins)
6046 6046 _invv (4 pins)
2 2 _invx10v (4 pins)
2 2 _invx12v (4 pins)
426 426 _invx2v (4 pins)
83 83 _invx3v (4 pins)
51 51 _invx4v (4 pins)
7 7 _invx5v (4 pins)
7 7 _invx6v (4 pins)
1 1 _invx7v (4 pins)
4 4 _invx8v (4 pins)
27 27 _mx2v (6 pins)
1300 1654 * _nand2v (5 pins)
188 199 * _nand3v (6 pins)
89 93 * _nand4v (7 pins)
576 932 * _nor2v (5 pins)
27 37 * _nor3v (6 pins)
6 6 _nor4v (7 pins)
386 30 * _pdw2v (4 pins)
11 0 * _pdw3v (5 pins)
8 8 _pdw40v (42 pins)
8 8 _pdw5v (7 pins)
8 8 _pdw6v (8 pins)
392 38 * _pup2v (4 pins)
11 0 * _pup3v (5 pins)
8 8 _pup40v (42 pins)
8 8 _pup5v (7 pins)
8 8 _pup6v (8 pins)
4470 3442 * _sdw2v (4 pins)
1 1 _sdw3v (5 pins)
1 1 _smp4v (6 pins)
3460 2748 * _sup2v (4 pins)
149 149 _sup3v (5 pins)
30 30 _xra2v (5 pins)
------ ------
Total Inst: 21580 19781
* = Number of objects in layout different from number in source.
**************************************************************************************************************
INCORRECT OBJECTS
**************************************************************************************************************
LEGEND:
-------
ne = Naming Error (same layout name found in source
circuit, but object was matched otherwise).
**************************************************************************************************************
INCORRECT NETS
DISC# LAYOUT NAME SOURCE NAME
**************************************************************************************************************
1 Net 935 NAND1916_Y
-------------------------- --------------------------
(_nand3v) ut ** missing connection **
X2/X1470/M5(1094.280,410.320):d
X2/X1470/M4(1095.860,410.320):s
X2/X1470/M3(1097.600,410.320):d
X2/X1470/M2(1094.280,417.880):s
** missing connection ** (_nand3v)ut
XNAND1916/XU1/MI_4-PT1:d
XNAND1916/XU1/MI_4-PT2:d
XNAND1916/XU1/MI_4-PT3:d
XNAND1916/XU1/MI_4-NT1:s
--------------------------------------------------------------------------------------------------------------
2 Net 1080 TRINV239_Y
-------------------------- --------------------------
(_pup2v):in2 ** missing connection **
X4/X1118/M24(520.420,622.320):g
(_pdw2v):in2 ** missing connection **
X4/X1118/M1(514.180,615.960):g
(_sdw2v):in2 ** missing connection **
X4/X1118/M5(520.420,615.960):g
(_sdw2v):in1 ** missing connection **
X4/X1118/M8(525.280,615.960):g
(_sdw2v):in2 ** missing connection **
X4/X1118/M9(526.660,615.960):g
(_sup2v):in2 ** missing connection **
X4/X1118/M20(514.600,622.320):g
(_sup2v):in1 ** missing connection **
X4/X1118/M23(518.920,622.320):g
(_bitcorev):br ** missing connection **
X4/X1636/M0(312.880,641.540):g
X4/X1636/M2(312.880,647.020):g
X4/X1636/M1(314.260,642.640):d
X4/X1636/M3(314.380,647.020):d
** missing connection ** (_nand2v):in1
XI5959/XY_tri/MI_1-PT2:g
XI5959/XY_tri/MI_1-NT2:g
** missing connection ** (_nor2v):in2
XI5959/XY_tri/MI_8-NT2:g
XI5959/XY_tri/MI_8-PT2:g
** missing connection ** (_bitcorev):bl
XU67530/MI_6-NT1:d
XU67530/MI_6-PT1:d
XU67530/MI_7-NT1:g
XU67530/MI_7-PT1:g |
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发表于 2013-7-1 11:33:37
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