在线咨询
eetop公众号 创芯大讲堂 创芯人才网
切换到宽版

EETOP 创芯网论坛 (原名:电子顶级开发网)

手机号码,快捷登录

手机号码,快捷登录

找回密码

  登录   注册  

快捷导航
搜帖子
查看: 18275|回复: 79

[资料] Embedded SoPC Design with Nios II Processor and Verilog Examples By Pong P

[复制链接]
发表于 2013-6-13 00:07:19 | 显示全部楼层 |阅读模式

马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。

您需要 登录 才可以下载或查看,没有账号?注册

x
Explores the unique hardware programmability of FPGA-based embedded systems, using a learn-by-doing approach to introduce the concepts and techniques for embedded SoPC design with Verilog
An SoPC (system on a programmable chip) integrates a processor, memory modules, I/O peripherals, and custom hardware accelerators into a single FPGA (field-programmable gate array) device. In addition to the customized software, customized hardware can be developed and incorporated into the embedded system as well—allowing us to configure the soft-core processor, create tailored I/O interfaces, and develop specialized hardware accelerators for computation-intensive tasks.
Utilizing an Altera FPGA prototyping board and its Nios II soft-core processor, Embedded SoPC Design with Nios II Processor and Verilog Examples takes a "learn by doing" approach to illustrate the hardware and software design and development process by including realistic projects that can be implemented and tested on the board.
Emphasizing hardware design and integration throughout, the book is divided into four major parts:
  • Part I covers HDL and synthesis of custom hardware
  • Part II introduces the Nios II processor and provides an overview of embedded software development
  • Part III demonstrates the design and development of hardware and software of several complex I/O peripherals, including a PS2 keyboard and mouse, a graphic video controller, an audio codec, and an SD (secure digital) card
  • Part IV provides several case studies of the integration of hardware accelerators, including a custom GCD (greatest common divisor) circuit, a Mandelbrot set fractal circuit, and an audio synthesizer based on DDFS (direct digital frequency synthesis) methodology
While designing and developing an embedded SoPC can be rewarding, the learning can be a long and winding journey. This book shows the trail ahead and guides readers through the initial steps to exploit the full potential of this emerging methodology.

Embedded SoPC Design_001.pdf

8.95 MB, 下载次数: 701 , 下载积分: 资产 -4 信元, 下载支出 4 信元

 楼主| 发表于 2013-6-13 00:08:30 | 显示全部楼层
回复 1# pkm_ind


   part 2

Embedded SoPC Design_002.pdf

10.48 MB, 下载次数: 767 , 下载积分: 资产 -4 信元, 下载支出 4 信元

 楼主| 发表于 2013-6-13 00:09:58 | 显示全部楼层
回复 2# pkm_ind


   part 3

Embedded SoPC Design_003.pdf

9.3 MB, 下载次数: 435 , 下载积分: 资产 -4 信元, 下载支出 4 信元

 楼主| 发表于 2013-6-13 00:11:18 | 显示全部楼层
回复 3# pkm_ind


   part 4 and final

Embedded SoPC Design_004.pdf

6.83 MB, 下载次数: 453 , 下载积分: 资产 -3 信元, 下载支出 3 信元

发表于 2013-7-20 18:16:47 | 显示全部楼层
这本书找的好辛苦,感谢楼主了!!!
发表于 2013-7-20 18:18:18 | 显示全部楼层
呵呵,我居然是第一位下载该书的人。赞一个!!再次感谢楼主!!!
发表于 2013-12-11 09:04:11 | 显示全部楼层
这本书好,感谢楼主!!!
发表于 2013-12-11 09:05:20 | 显示全部楼层
赞一个!!再次感谢~
发表于 2013-12-11 09:07:03 | 显示全部楼层
社会主义好!感谢楼主~~
发表于 2013-12-11 09:12:07 | 显示全部楼层
再次感谢楼主!!!
您需要登录后才可以回帖 登录 | 注册

本版积分规则

关闭

站长推荐 上一条 /2 下一条


小黑屋| 手机版| 关于我们| 联系我们| 在线咨询| 隐私声明| EETOP 创芯网
( 京ICP备:10050787号 京公网安备:11010502037710 )

GMT+8, 2024-11-22 13:50 , Processed in 0.023163 second(s), 8 queries , Gzip On, Redis On.

eetop公众号 创芯大讲堂 创芯人才网
快速回复 返回顶部 返回列表