open source SystemVerilog verification IPs, models vip

seulk · 发表于 2021-6-22 09:12:53

感谢分享，不知有没有ahb vip

steven_sun · 发表于 2021-6-16 06:19:43

感谢

vsop · 发表于 2021-6-11 13:32:16

谢谢分享

qptom · 发表于 2021-1-21 10:44:33

谢谢分享！

juneshang · 发表于 2021-1-17 23:09:42

很不错的资料

oxm01606@iaoss. · 发表于 2021-1-13 16:26:44

thanks

oxm01606@iaoss. · 发表于 2021-1-13 16:03:43

thanks

timelimit · 发表于 2021-1-13 15:58:40

很不错的资料

542002990 · 发表于 2021-1-13 14:39:34

支持。

ID2007 · 发表于 2020-11-16 09:16:06

After downloading and unpacking package you will have the following folder hierarchy:
• i2c_vip
• docs
• examples
• sim
• testbench
• verification_ip
• master
• slave
The Verification IP is located in the verification_ip folder. Just copy the content of this folder to
somewhere in your verification environment.

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[资料] open source SystemVerilog verification IPs, models vip

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