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[招聘] 【Marvell】南京COT部门招聘 Physical Design Engineer

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发表于 2013-3-19 16:44:32 | 显示全部楼层 |阅读模式

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Job title: Physical Design Engineer

Department: COT-PD

Location: Nanjing

Responsibilities:

As member of Marvell central physical design team, you will play a challenging role in assisting multiple Marvell design groups in sign-off check includes power/signal integrity analysis (IR drop, EM, ESD), physical verification (DRC/LVS/ERC/Antenna), chip-level layout and tapeout, as well as maintaining power analysis and physical verification flow, custom layout and add-on tools.

Requirements:

o
2+ years of direct experience on IC design. BS/MS preferred.

o
Knowledge in some of the following technical areas: custom layout, PCB layout, power consumption calculate, timing, chip package.

o
Proven track records of working independently on running and debugging chip-level DRC/LVS/ERC/Antenna results.

o
Understanding of power planning, be able to analyze the weakness of power grid and provide solution.

o
Be Familiar with Laker, Cadence virtuoso, or Mentor DesignRev. Strong knowledge to debug Mentor’s Calibre or Synopsys’ Hercules tools.

o
Be familiar with Apache, Encounter Power System, or PrimeRail.

o
Must be programming-minded, capable of writing Tcl or Perl.

o
Self-motivated team worker, good verbal and written communication skills.

o
Knowledge of Cadence or Synopsys Place and Route tools a big plus.

o
Must able to work under tapeout pressure and tight schedule

更多Marvell招聘职位:

http://companyadc.51job.com/companyads/2012vip/sh/marvell0120_7399/jobs.htm

If you are interested in exploring a job opportunity with Marvell

please send me a copy of your resume to: AL-China-HR@marvell.com
Email Subject: 姓名_学历_学校_工作年限_应聘岗位_意向城市; 比如: 张三_硕士_东南大学_3yrs_Platform_南京


更多关注:

Marvell官方微博:http://e.weibo.com/marvellcn

Marvellhr官方微博:   http://weibo.com/marvellhr

发表于 2013-5-31 09:42:18 | 显示全部楼层
回复 1# Hwangbo


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