VERILOG FOR SYNTHESIS

jason99pan

VERILOG FOR SYNTHESIS

This manual is primarily intended for students designing and testing VLSI integrated circuits.

This manual consists of four main parts:
• Primer for UNIX, for persons who have not yet worked with UNIX. It provides the minimum necessary  knowledge to have some orientation in the operating system and to start Verilog.
• Primer for Verilog, to start the tool and learn the simplest steps for entering the circuit description and doing the simulation.
• A short introduction to the syntax and structure of Verilog models with special emphasis on synthesizability.
• Three full examples of circuits/systems descriptions.

wued7

xilinx的资料吧
下载了

tangerui

good material

rbmm756

xiexiexie4 !!!!!!!!!!!

lixqing

谢谢

wapon

谢谢了..我下在看看

wapon

谢谢了..我下在看看

xmc214

感谢分享

armmips

Thanks for your Sharing

weixbox

                               
登录/注册后可看大图