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Digital_Clocks_for_Synchronization_and_Communications

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发表于 2006-12-28 04:34:08 | 显示全部楼层 |阅读模式

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Digital_Clocks_for_Synchronization_and_Communications

Preface
It was not until the 1970s that digital systems were first used for large-scale
telecommunication networking. Performance enhancements since then have
been strongly tied to advances in synchronization technology. Modern digital
data transmission cannot work without clocks. Their rhythm—or oscillator
frequency—controls the operation of devices and components, and thus
it must be distributed throughout networks and shared by systems. Current
communication arrangements such as different synchronous digital hierarchy
(SDH)-based variants have the advantage of inherently sharing the same
clock. In practice, high quality clocks are indispensable, as they simplify
operational concepts and enhance the service level observed by the
customers.
The key parameter of a clock is its frequency. Digital communication is
likely to fail if this fundamental attribute is transferred or generated without
regard to its purity. When designing a network, the time domain stability
and spectral purity of the synchronization signal have to be assured for all
network elements and components. A basic telecom clock system involves
both synchronization and signal generation tasks. This book examines the
use of various phase-locked loop (PLL) techniques for clock synchronization
and the direct digital synthesizer (DDS) concept for clock generation.
Although there are many ways of constructing and arranging clock assemblies,
the fundamental issue is achieving adequate signal characteristics. The
goal of this book is to show how this can be achieved.
xv
The PLL is a common functional module in several engineering disciplines,
as well as in telecom and electronics applications. Complete PLL
modules having all the basic elements are available, but these ready-made
devices may not meet the system requirements. It is often necessary to design
a task-specific PLL if system performance has to be maximized, but this is
seriously hampered by the multiple trade-offs involved. Moreover, the
number of parameters that must be considered is high. Because a detailed
explanation of the physical mechanisms is provided in this book rather than a
calculation of precise values, the reader will be assisted in understanding the
basic procedures and characteristics. Also, a coarse loop design method and
associated useful estimation strategies are described.
The importance of the DDS concept almost equals that of the classical
PLL. It can achieve characteristics that are impossible with the conventional
analog approach. The DDS is a promising technology in that it simplifies
previously complicated synthesizers. Applications in measurement instruments
and cellular communication devices make use of its significant potential,
and the enhanced speeds offered by digital circuits will only strengthen
this trend. Sophisticated circuit designs are necessary in order to reduce the
unnecessary or interfering frequency components generated due to the digital
processing. This book provides a detailed review of the relevant
mechanisms.

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 楼主| 发表于 2006-12-28 04:35:08 | 显示全部楼层
Digital_Clocks_for_Synchronization_and_Communications

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发表于 2007-3-1 21:14:35 | 显示全部楼层
感謝你的分享
发表于 2007-3-7 12:52:44 | 显示全部楼层
下载了,谢谢楼主....... :lol
头像被屏蔽
发表于 2007-5-7 20:13:08 | 显示全部楼层
提示: 作者被禁止或删除 内容自动屏蔽
发表于 2007-5-11 13:26:48 | 显示全部楼层
下载了,谢谢分享!
发表于 2007-5-11 13:27:53 | 显示全部楼层
内容还不错啊!
发表于 2007-5-28 18:26:15 | 显示全部楼层
kankan
发表于 2007-5-28 21:25:54 | 显示全部楼层
谢谢分享!
发表于 2007-5-29 14:52:35 | 显示全部楼层
Good ebook,especially for the concepts of DDFS with PLL!
Thanks for sharing!
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