FPGA生成LVDS宏模块问题

yangweizaixian

  我用的LVDS发送宏模块接收从外部输入的LVDS信号，共12组；最后综合的时候，显示：
Error: Specified DDIO registers are not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_oututclock_ddio|LVDS_IN_ddio_out1:auto_generated|output_cell_L[0]" is not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_oututclock_ddio|LVDS_IN_ddio_out1:auto_generated|output_cell_H[0]" is not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_out:tx_deser_2|LVDS_IN_ddio_out:auto_generated|output_cell_L[11]" is not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_out:tx_deser_2|LVDS_IN_ddio_out:auto_generated|output_cell_H[11]" is not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_out:tx_deser_2|LVDS_IN_ddio_out:auto_generated|output_cell_L[10]" is not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_out:tx_deser_2|LVDS_IN_ddio_out:auto_generated|output_cell_H[10]" is not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_out:tx_deser_2|LVDS_IN_ddio_out:auto_generated|output_cell_L[9]" is not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_out:tx_deser_2|LVDS_IN_ddio_out:auto_generated|output_cell_H[9]" is not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_out:tx_deser_2|LVDS_IN_ddio_out:auto_generated|output_cell_L[8]" is not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_out:tx_deser_2|LVDS_IN_ddio_out:auto_generated|output_cell_H[8]" is not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_out:tx_deser_2|LVDS_IN_ddio_out:auto_generated|output_cell_L[7]" is not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_out:tx_deser_2|LVDS_IN_ddio_out:auto_generated|output_cell_H[7]" is not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_out:tx_deser_2|LVDS_IN_ddio_out:auto_generated|output_cell_L[6]" is not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_out:tx_deser_2|LVDS_IN_ddio_out:auto_generated|output_cell_H[6]" is not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_out:tx_deser_2|LVDS_IN_ddio_out:auto_generated|output_cell_L[5]" is not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_out:tx_deser_2|LVDS_IN_ddio_out:auto_generated|output_cell_H[5]" is not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_out:tx_deser_2|LVDS_IN_ddio_out:auto_generated|output_cell_L[4]" is not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_out:tx_deser_2|LVDS_IN_ddio_out:auto_generated|output_cell_H[4]" is not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_out:tx_deser_2|LVDS_IN_ddio_out:auto_generated|output_cell_L[3]" is not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_out:tx_deser_2|LVDS_IN_ddio_out:auto_generated|output_cell_H[3]" is not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_out:tx_deser_2|LVDS_IN_ddio_out:auto_generated|output_cell_L[2]" is not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_out:tx_deser_2|LVDS_IN_ddio_out:auto_generated|output_cell_H[2]" is not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_out:tx_deser_2|LVDS_IN_ddio_out:auto_generated|output_cell_L[1]" is not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_out:tx_deser_2|LVDS_IN_ddio_out:auto_generated|output_cell_H[1]" is not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_out:tx_deser_2|LVDS_IN_ddio_out:auto_generated|output_cell_L[0]" is not part of a legal DDIO circuit
Error: Register "LVDS_IN:inst6|altlvds_tx:altlvds_tx_component|altddio_out:tx_deser_2|LVDS_IN_ddio_out:auto_generated|output_cell_H[0]" is not part of a legal DDIO circuit
帮忙看看怎么解决，谢谢！