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Springer New Book
CMOS_Integrated_Switching_Power_Converters.zip
(9.83 MB , 下载次数:
665 )
Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Technological Scenario . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.3 Thesis Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2 The Design Space Exploration: Simplified Case . . . . . . . . . . . . . . . . . . 9
2.1 Main Concepts and Design Procedure . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2 Simplified Approach for a Buck Converter . . . . . . . . . . . . . . . . . . . . . 15
2.2.1 Continuous and Discontinuous Conduction Modes . . . . . . . 15
2.2.2 Converter Components Simplified Models . . . . . . . . . . . . . . 16
2.2.3 Output Voltage Ripple . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
2.2.4 Design Space Exploration Results . . . . . . . . . . . . . . . . . . . . . 33
3 Contributions on Converter Integrated Components
and Detailed Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
3.1 Bonding Wire Inductor Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
3.1.1 State of the Art . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
3.1.2 Proposed Integrated Inductor Implementation . . . . . . . . . . . 49
3.2 MOS Capacitor Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
3.2.1 State of the Art . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
3.2.2 Proposed MOS Capacitor Design Procedure . . . . . . . . . . . . 63
3.2.3 Comparison with Poly-Poly and Metal-Metal Capacitors . . 80
3.3 Tapered Buffer Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
3.3.1 State of the Art . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
3.3.2 Proposed Energy Consumption Model . . . . . . . . . . . . . . . . . 83
3.3.3 Proposed Fall-Rise Time Model . . . . . . . . . . . . . . . . . . . . . . . 87
3.3.4 Optimized Design of Tapered Buffer Driving a Power
MOSFET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
3.3.5 Propagation Delay td Constraint in the Driver Design . . . . . 93
3.3.6 Area Occupancy Considerations . . . . . . . . . . . . . . . . . . . . . . 95
3.4 Power MOSFET Losses Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
3.4.1 State of the Art . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
xiiixiv Contents
3.4.2 Switching Losses Evaluation . . . . . . . . . . . . . . . . . . . . . . . . . 98
3.4.3 Conduction Losses Evaluation . . . . . . . . . . . . . . . . . . . . . . . . 113
3.4.4 Area Occupancy Considerations . . . . . . . . . . . . . . . . . . . . . . 115
3.4.5 Power MOSFETs and Drivers Codesign Procedure . . . . . . . 115
4 Buck Converter Design Space Exploration with Detailed
Component Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
5 3-Level Buck Converter Analysis and Specific Components Models . 133
5.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
5.2 Ideal Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
5.2.1 Basic Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
5.2.2 3-Level Buck Converter Analytical Expressions . . . . . . . . . 139
5.2.3 3-Level and Classical Buck Converters Comparison . . . . . . 155
5.3 Self-Driving Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
5.4 Specific Components Models and Implementation . . . . . . . . . . . . . . 164
5.4.1 Cx Capacitor Implementation. . . . . . . . . . . . . . . . . . . . . . . . . 164
5.4.2 Power MOSFET Energy Losses Evaluation . . . . . . . . . . . . . 165
6 3-Level Buck Converter Design Space Exploration Results . . . . . . . . 171
6.1 Design Space Exploration Results for the Io = 100 mA Case . . . . . 171
6.2 Design Space Exploration Results for a Io Wide Range . . . . . . . . . . 184
6.3 The Selected Design to be Implemented . . . . . . . . . . . . . . . . . . . . . . . 190
7 3-Level Buck Converter Microelectronic Implementation . . . . . . . . . 197
7.1 Secondary Control Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 197
7.1.1 Variable Duty-Cycle Generation of the Switching Signal . . 201
7.1.2 P1, P2 and s Signals Generation . . . . . . . . . . . . . . . . . . . . . . 202
7.1.3 dnN1 and dnN2 Signals Generation . . . . . . . . . . . . . . . . . . . 204
7.1.4 iL = 0 Condition Feedback Loop . . . . . . . . . . . . . . . . . . . . . 214
7.1.5 Dead-Time (tBD) Adjustment Feedback Loop . . . . . . . . . . . 224
7.1.6 Inductor Short-Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 234
7.1.7 Overall Layout Design of the Secondary Control Loop . . . 237
7.2 Power Plant Implementation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 238
7.2.1 Co Capacitor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 239
7.2.2 Cx Capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 239
7.2.3 Inductor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 240
7.2.4 Power Drivers Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 240
7.2.5 Power Transistors Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . 244
7.2.6 Overall Layout Design of the Power Plant . . . . . . . . . . . . . . 246
7.3 Complete Converter Design and Results . . . . . . . . . . . . . . . . . . . . . . . 247Contents xv
8 Conclusions and Future Research Lines . . . . . . . . . . . . . . . . . . . . . . . . . 257
8.1 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 257
8.2 Future Research Lines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 265
A Equilateral Triangular Spiral Inductor Detailed Calculations . . . . . . 269
A.1 Self-Inductance of a Triangular-Shaped Single Inductor . . . . . . . . . . 269
A.1.1 Application of the Biot-Savart Theorem to Calculate
the Magnetic Flux Density . . . . . . . . . . . . . . . . . . . . . . . . . . . 269
A.1.2 Magnetic Flux Density Integration Throughout Half
of the Triangle Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 270
A.1.3 Self-Inductance Obtention . . . . . . . . . . . . . . . . . . . . . . . . . . . 272
A.2 Self-Inductance of the Whole Triangular Shaped Spiral . . . . . . . . . . 273
B On Power Losses Related to the Capacitor Charging Process
from a Constant Voltage Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 277
C Proportional Switching Frequency Modulation Towards Power
Efficiency Optimization for DCM Operated Converters . . . . . . . . . . . 281
C.1 Switching Frequency Modulation for a Buck Converter . . . . . . . . . . 281
C.2 Extension to the 3-Level Converter Case . . . . . . . . . . . . . . . . . . . . . . 283
C.3 Output Voltage Hysteretic Control as an Approach to the Linear
Modulation of the Switching Frequency. . . . . . . . . . . . . . . . . . . . . . . 284
C.3.1 Application to an Ideal Classical Buck Converter . . . . . . . . 284
C.3.2 Effect of the Output Capacitor ESR Upon the Switching
Frequency Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 286
C.3.3 Optimum Switching Frequency Modulation vs. Output
Voltage Hysteretic Control . . . . . . . . . . . . . . . . . . . . . . . . . . . 287
C.3.4 Energy Efficiency Comparison Between Hysteretic
Control and Optimized Linear Laws . . . . . . . . . . . . . . . . . . . 289
C.3.5 Output Voltage Ripple Produced by the Hysteretic Control
Application. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 290
C.3.6 Effect of the Feedback Loop Delay Upon the Switching
Frequency Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 294 |
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