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IO Checker 2.2
Verifying hundreds of FPGA IO pins between PCB and FPGA in minutes
When using large FPGA's on a PCB making sure that the FPGA pins are connected to the right signals on the PCB is a cumbersome task. On the FPGA side the pins are assigned to the HDL signals that form the toplevel of the logic implemented on the FPGA. On the PCB side the pins have to be connected to the proper net that will connect it to other components on the PCB. Because implementation of FPGA and PCB is often done in parallel and by different engineers, the signal names used are not always identical. To make things even worse, it is often necessary to perform pin swaps to prevent PCB routing problems. These pin swaps have to be made both on the FPGA and the PCB. As this is almost always manual work, and current devices have over 1500 pins, a mistake is easily made.
Intelligent Verification
IO Checker uses rules (based on regular expressions) to match the signal names in both the FPGA and PCB design environment. It allows the tool to validate groups of matches although individual signals can still differ. The rules can be generated automatically and be fine-tuned by the designer. The automated approach will often match 80% to 90% of all device pins.
The flexibility of IO Checker allows it to be used in any design flow and does not require any design methodology. The rules generator in combination with the sorted problem view allows engineers to validate a 1000+ pins device in half an hour.
Once the project and its rules are defined it is a simple task to keep the FPGA and PCB data consistent. All out-of-date files are processed in one action and all changes are reported.
Features & Benefits
- Compare FPGA and PCB pin names using regular expressions
- Create & update FPGA constraint file
- Automatic rule generation
- Voltage checks for power pins
- User directed acceptance of verified differences
- One click verification and consistency
- Reports incremental changes in pin- and net list
- Concentrate on a dozen differences instead of a thousand lines
- Fits in any design flow
- HTML report
UnRAR code/password: eetop.cn
Homepage
- http://www.hdlworks.com/products/iochecker/index.html
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Please verify downloads against the MD5 checksums listed below to see if files are all OK!
HDL_Works_IO_Checker_2.2.R2_for_Linux-BEAN
- 052a4f621dce028e29c6d00953d9457c HDL_Works_IO_Checker_2.2.R2_for_Linux-BEAN.part1.rar
- f64ef980742e4b15a908279f6e97e618 HDL_Works_IO_Checker_2.2.R2_for_Linux-BEAN.part2.rar
- 11ed2ef56b8ae41b8f19352f06164348 HDL_Works_IO_Checker_2.2.R2_for_Linux-BEAN.part3.rar
- c4456f12c8914234469f65ee6c86e757 HDL_Works_IO_Checker_2.2.R2_for_Linux-BEAN.part4.rar
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HDL_Works_IO_Checker_2.2.R2_for_Windows-BEAN
- 678fdc5f6defcb1c0cc45ddd48ba8a3b HDL_Works_IO_Checker_2.2.R2_for_Windows-BEAN.part1.rar
- 5667d1a8cc6491ec8f653a3ccb11a267 HDL_Works_IO_Checker_2.2.R2_for_Windows-BEAN.part2.rar
- cad891578121b958020a6d61ca967d74 HDL_Works_IO_Checker_2.2.R2_for_Windows-BEAN.part3.rar
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HDL_Works_IO_Checker_2.2.R2_for_Linux-BEAN.part1.rar
15 MB, 下载次数: 12
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资产 -5 信元, 下载支出 5 信元
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HDL_Works_IO_Checker_2.2.R2_for_Linux-BEAN.part2.rar
15 MB, 下载次数: 11
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资产 -5 信元, 下载支出 5 信元
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HDL_Works_IO_Checker_2.2.R2_for_Linux-BEAN.part3.rar
15 MB, 下载次数: 11
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资产 -5 信元, 下载支出 5 信元
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HDL_Works_IO_Checker_2.2.R2_for_Linux-BEAN.part4.rar
8.6 MB, 下载次数: 11
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资产 -4 信元, 下载支出 4 信元
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HDL_Works_IO_Checker_2.2.R2_for_Windows-BEAN.part1.rar
15 MB, 下载次数: 18
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资产 -5 信元, 下载支出 5 信元
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HDL_Works_IO_Checker_2.2.R2_for_Windows-BEAN.part2.rar
15 MB, 下载次数: 16
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资产 -5 信元, 下载支出 5 信元
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HDL_Works_IO_Checker_2.2.R2_for_Windows-BEAN.part3.rar
14.33 MB, 下载次数: 16
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