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发表于 2007-1-22 12:23:15
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[6] M.A. Cirit, " Estimating dynamic power consumption of CMOS circuits", Proc. IEEE Int.
Conf. Computer Aided Design, pp.534-537, Nov. 1987.
[7] S.R. Powell and P. Chan, "Estimating power dissipation of VLSI signal processing chips:
The PFA technique", VLSI Signal Processing IV, New-York: IEEE Press, 1990, Chapter 24.
[8] H.J.M. Veendrick, "Short-circuit dissipation of static CMOS circuitry and its impact on the
design of buffer circuits", vol. Sc-19, pp. 468-473, Aug. 1984.
[9] B. Nadel, "The Green Machine", PC Magazine, vol.12, no.10, pp.110, May, 1993.
We state that low power in analog means to fit the design within the specifications
with the minimum possible power consumption by using the most efficient
architecture. |
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