【AMD北京】 MTS. ASIC CAD Engineer(Timing Analysis)

navorski

If you're interested please send your resume to haoyu.yang@amd.com


Job Description:                 
  Participate in the design and implementation of the leading edge, front-to-back ASIC design flow which covers logical and physical implementation and analysis of complex devices that integrate multiple cores and IP’s from organizations with AMD global teams.
  Co-work with North American CAD team, and mainly focus on timing analysis flow, design guideline which is used by AMD dGPU and APU projects.
  Participate in the research of Design Methodology to improve automation and  productivity to produce AMD's new high-quality cutting-edge products
  Technical support and programming
  Provide support to global Front-end and physical design team especially shanghai design team
  Interface with EDA venders on technologyPreferred

Experience:        
  major in EE, CS or related, Master Degree with 5+ years or Bachelor with 7+ years working experiences        
  good programming skill with one or more languages (e.g. tcl, perl , python, c/c++, etc) in unix/linux and a strong desire to automate flow        
  good knowledge of static timing analysis ( including MCMM, AOCV) and related EDA tools ( like Primetime)        
  knowledge of hierarchical design is a plus        
  experience of physical design is a plus        
  knowledge of low power design methodology (UPF / CPF) is a plus        
  Good written and spoken English        
  Good communication skills and be able to work both independently and in a team