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SPECTRUM MONITOR FOR COGNITIVE RADIO
By
Siwen Liang
Thesis for the degree of Doctor of Philosophy
December 2010
Supervisor: Professor William Redman-White
Contents
Chapter 1 Introduction ......................................................................................... 1
1.1 Overview of Research .................................................................................... 1
1.2 Ideal Spectrum Monitor Requirement ............................................................ 2
1.3 Document Structure ....................................................................................... 4
1.4 Declaration ..................................................................................................... 5
Chapter 2 Cognitive Radio and Wideband Receiver Review............................ 7
2.1 Introduction .................................................................................................... 7
2.2 Software Defined Radio and Cognitive Radio ............................................... 7
2.2.1 Software Defined Radio History ........................................................ 7
2.2.2 Evolution to Cognitive Radio............................................................. 9
2.3 Wideband Receiver Architectures ................................................................ 11
2.3.1 TV Tuner .......................................................................................... 11
2.3.2 UWB Receiver ................................................................................. 14
2.3.3 Receiver Architectures Comparison ................................................ 18
2.4 Summary ...................................................................................................... 20
Chapter 3 Figures of Merits ............................................................................... 21
3.1 Introduction .................................................................................................. 21
3.2 Theoretical (ITRS) and Practical Analysis Approaches .............................. 23
3.3 FoMs of Receiver Blocks ............................................................................. 30
3.3.1 Low Noise Amplifier ....................................................................... 30
3.3.2 Mixer ................................................................................................ 55
3.3.3 Voltage Controlled Oscillator .......................................................... 60
3.3.4 Frequency Divider ............................................................................ 70
3.3.5 Baseband Blocks (LPF and VGA) ................................................... 72
3.3.6 Analogue to Digital Converter ......................................................... 82
3.3.7 FoM Prediction Summary ................................................................ 92
3.4 Summary ...................................................................................................... 94
Chapter 4 Integrated CMOS Spectrum Monitor Architectures..................... 95
4.1 Introduction .................................................................................................. 95
4.2 Spectrum Monitor Specifications ................................................................. 97
4.2.1 Receiving Chain (Front-End and ADC) ........................................... 97
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4.2.2 Frequency Synthesizer ................................................................... 106
4.3 Architectures Selection .............................................................................. 106
4.3.1 Direct Conversion .......................................................................... 106
4.3.2 Up-Down-Down Conversion ......................................................... 108
4.3.3 Dual-Down Conversion ................................................................. 111
4.4 System Level Design ................................................................................. 114
4.5 Summary .................................................................................................... 121
Chapter 5 High Frequency Integrated Passive Band Pass Filters ................ 123
5.1 Introduction ................................................................................................ 123
5.2 Bandpass Filters Topology ......................................................................... 124
5.2.1 Conventional Bandpass Filter Topology ........................................ 124
5.2.2 Coupled Resonator Bandpass Filter Topology .............................. 126
5.2.3 Comparison of the Two Topologies ............................................... 129
5.3 Inductor Design .......................................................................................... 131
5.4 10GHz BPF Designs for Up-Conversion Architecture .............................. 143
5.4.1 Specifications ................................................................................. 143
5.4.2 Delta-Star Transformation Techniques .......................................... 144
5.4.3 Filter Implementation ..................................................................... 146
5.4.4 Simulation and Measurement Results ............................................ 149
5.5 1.75GHz BPF Design for Down-Conversion Architecture ....................... 154
5.5.1 Specifications and Implementations .............................................. 154
5.5.2 Simulation and Measurement Results ............................................ 156
5.6 Summary .................................................................................................... 160
Chapter 6 Wide Tuning Range Frequency Synthesiser ................................ 161
6.1 Introduction ................................................................................................ 161
6.2 System Level Design ................................................................................. 162
6.3 Voltage Controlled Oscillator Design ........................................................ 171
6.4 Frequency Divider Design ......................................................................... 179
6.5 Phase/Frequency Detector and Charge Pump design ................................ 186
6.6 Implementation, Simulation and Measurement ......................................... 188
6.6.1 Simulation Results ......................................................................... 190
6.6.2 Measurement Results ..................................................................... 192
6.7 Summary .................................................................................................... 199
Chapter 7 Conclusion ........................................................................................ 201
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7.1 Summary of the Chapters ........................................................................... 201
7.2 Comments .................................................................................................. 204
7.3 Future work ................................................................................................ 205
Appendix A 207
Appendix B 241
Appendix C 249
References 269 |
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