RTL Hardware design using VHDL: Efficiency, Portability, and Scalability

portis · 发表于 2012-5-8 18:09:53

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apteye · 发表于 2012-5-8 20:30:04

thanks

fixit · 发表于 2012-5-8 20:42:01

thanks a lot

fixit · 发表于 2012-5-8 20:42:19

谢谢楼主！

fixit · 发表于 2012-5-8 20:42:26

kankan！

849738301 · 发表于 2012-5-8 20:57:56

谢谢，共享万岁！

richyrichy · 发表于 2012-5-8 23:51:29

Good; thanks.

On the other side, Verilog is more prevailing except in Europe (at least from my understanding).

portis · 发表于 2012-5-9 15:30:30

Good; thanks.

On the other side, Verilog is more prevailing except in Europe (at least from my un ...
richyrichy 发表于 2012-5-8 23:51

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That's true. And especially in academic area.

stanley015 · 发表于 2012-7-25 10:14:09

下来看看先

paraside · 发表于 2012-9-7 09:55:45

好啊，终于找到这本书了

[原创] RTL Hardware design using VHDL: Efficiency, Portability, and Scalability