【社会招聘】LSI上海研发中心2012年2月最新职位

yulingyanyuyu

2012 LSI上海研发中心的扩张脚步依然继续。。。欢迎有志于芯片研发的您加入！！！

有意者，请将简历发至：Tracey.zheng@lsi.com

如有任何疑问，请发送邮件至Tracey.zheng@lsi.com或拨打电话021-24191709.

也可加我msn: zql975504@hotmail.com

或者微博啊：http://www.weibo.com/u/1752448637

LSI上海研发中心位于徐汇区中山南二路徐汇苑大厦（8万人体育场对面）

1.
Preamp Analog Modeling Engineer

Job Description

- Develop analog behavior models for Preamp analog IPs to support full chip Digital-centric Mixed-Signal (DMS) verification.

- Develop analog or mixed-signal behavior models for basic analog blocks, such as OSC, Regulator, digital I/O, ADC, DAC, etc. to support Analog Mixed-Signal (AMS) verification.

- Model verification by implementing mixed-signal simulation and analog spice simulation for results comparison.

- Model integration into DMS/AMS verification environment and assist full chip functional verification.

- Work with analog/digital/product engineers to implement documents of modeling work.

- Ability to follow a disciplined analog modeling methodology and work closely with a multi-location, international design team.

- Excellent teamwork and communication skills are required.

Requirements/Qualifications (Education)

- Preferred degree in Electrical or Electronic Engineering.

- BS required, MS preferred

- The ideal candidate will have over 3 years of experience on analog/mixed-signal design, verification or analog behavior modeling

- Good understanding of basic analog circuits like Op-Amp, OSC, bandgap, regulator, low/high pass filter, ADC/DAC

- Good at Verilog/Verilog-AMS or VHDL-AMS coding, familiar with system-verilog or Tcl/Perl script is a plus

- Experience with the usage of various EDA tools such as Spectre, NC-Sim/irun, AMS simulator etc. is preferred

- Good knowledge of discrete signal processing is a plus

- Strong communication skills (must be proficient in both spoken and written English)

- Able to travel internationally (to United States and throughout Asia)

- Understanding of silicon process technologies (CMOS and Bipolar) and device physics would be a plus.

- Proven analytical skills (application of math and physics to solve problems)

2.

Debug Engineer

JOB DESCRIPTION:

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This position is part of the LSI’s world-leading head-to-host recording system design validation team, and focus on high speed pre-amplifier debug and validation.

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Work with chip design and other characterization teams in design verification and characterization and errata corrective action, as well as work with program management, test and product engineering to insure timely delivery of fully validated silicon.

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Develop automated scripts and program test equipment to automate data collection and report generation. Where automated measurements are not practical, manual data collection is to be performed

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Support bench application engineers with in-depth customer specific measurements and failure analysis

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Set up bench test equipment and perform characterization measurements on high speed(>4GHz) mixed signal IC's, paying careful attention to measurement accuracy and repeatability and test condition coverage

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Design and layout evaluation PCBs, paying careful attention to high speed signals and board component parasitic

PREFERRED EXPERIENCE:

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Investigative and analytical mindset, with a strong interest in electronics and technical work

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A thorough knowledge of electronic circuits and systems with practical experience in analog and digital electronic circuit design and debug

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"Hands-on" experience on design and development of software control systems for automated test equipment. Demonstrate proficiency in LabVIEW and TestStand programming

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Understands the operation of common interfaces and busses such as RS232, GPIB, Ethernet, USB

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Experience or background with one of the following areas is preferred

a)
Experiences in RF, high-speed connector(SATA, DDR etc), gesture recognition or storage system(HDD, Flash etc) measurement

b)
Experiences in Cadence Allegro HDL(Concept) PCB development.

c)
System Signal Integrity analysis experience with Agilent ADS

-
Expertise in applied magnetism and recording a plus

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Good communication skills, especially in technical writing and reporting

Education/Certifications

Required Degree: BS with 5 years
Preferred Degree: MS with 3 years or PhD
Preferred Major: Electrical Engineering or related discipline

3.
Read Channel Verification Engineer

JOB DESCRIPTION:

As a member of the Read Channel team, candidate must be willing to work as an extended

member of the design team. Duties will include functional verification of Storage read

channel mixed-signal IP. Candidate will be expected to contribute to design and development

of System Verilog based verification environment and will be responsible for verification

closure of block/chip/system level functions for mixed signal based IP. Experience with

System Verilog and functional coverage methodologies are required. Must be willing to

follow a disciplined verification methodology and to work closely with a multi-location,

international design team. Excellent teamwork and communication skills are required.

PREFERRED EXPERIENCE:

BSEE with 3-5+ years of design and/or verification experience required, MSEE preferred.

Required knowledge and skills:

- Expertise in System Verilog required

- Good understanding of Digital Signal Processing

- Good understanding of Analog and Digital Circuits

- Very good analytical/debugging skill

- Good verbal and written communication skills

Desirable skills:

- Knowledge of Verilog-AMS, Perl

- Knowledge of verification methodologies including functional coverage and constrained

random testing

- Knowledge of VLSI design flows & DFT

- Familiarity of high level programming language

- Experience working with globally distributed team

4.
Digital Design Engineer-Shanghai

Job Responsibilities

Working with an Architecture/Algorithm Development Team to finalize system architecture

for optimal implementation of digital signal processing algorithms, including architectural

definition and tradeoffs, die size, power estimation.

Skill required:

Digital logic design, verilog coding, logic synthesis, both RTL and gate level verification,

formal verification and static timing analysis. Unix shell, Perl scripting, C/RTL co-simulation.

Sound theory background  of communication and Digital signal processing.

5.

ASIC Design Engineer

Job Description

- Looking for a candidate who is familiar with digital IC design methodologies, understands all stages of ASIC design flows, and is experienced with state-of-the-art design tools. The candidate has solid knowledge of timing closure and synthesis flow and is experienced in logic design and verification.

- Minimum requirements:* Knowledge of HDL and experience in behavioral and RTL coding, Verilog preferred

- Knowledge of logic synthesis and timing analysis.* DSP and communications background is a plus

Requirements/Qualifications (Education)

- B.S. required, MS/Ph.D. a plus. At least 3 years of experience

6.
ASIC Customer Engineer-Shanghai

Job Description

- LSI Corporation offers an excellent opportunity to contribute to a team environment and to grow personal career path. You will be working with internal and external customers to develop state of the art IC solutions utilizing LSI's leading edge CMOS cell-based ASIC technologies. You will have responsibility for ASIC designs through all of the key development and implementation phases including RTL analysis, synthesis, design optimization, timing verification, simulation, test insertion, physical design, vector generation, and post-prototype test support. Candidates will have opportunity to work on the latest 40nm/28nm designs.

Requirements/Qualifications (Education)

Education: BS/MS Electrical, Computer Engineering or Equivalent

- Candidates have ONE OR MORE good skill sets of the following areas are highly encouraged to apply:

- RTL Analysis/Synthesis/STA: The ideal candidate should have strong skills for the front-end of design

- implementation which includes RTL Analysis, Synthesis Strategies, and STA setup for complex ASIC

- environments. This would include strategies for power management.

- OR

Physical Design Implementation: The ideal candidate should be strong in the Physical Design (at least at block level) which includes floor planning, design closure, & STA. Having strong DRC & LVS skills are a plus.

- Synopsys Astro/ICC experience a plus. Having Mentor Calibre skills a plus.

- OR

- Physical Verification: The ideal candidate should have in-depth understanding of transistor level IC fabrication process, familiar with major foundries(TSMC or SMIC) runsets and verification flow, custom layout experience is a plus, successfully done LVS/DRC/ERC/Antenna check for multiple tapeouts is a strong plus. Understanding of DFM is a plus. Calibre experience is a plus.

- OR

- DFT: The ideal candidate should be strong in all DFT (Design for Test) for all aspects. This would include
- scan/TDF, TestKompress, MEMBIST/BISR, JTAG and etc. Having STA skills is a plus for all aspects of test. Responsible for support / debug of customer designs after delivery of prototypes

7.
Signal Integrity & Application Engineer

JOB DESCRIPTION:

This position will define SI requirements on advanced memory interface solutions including

DDR3/4, RLDRAM III and ONFI 2.2 NAND Flash interfaces. Work in a co-design environment

by providing specifications to IO and package designers. Develop IP implementation

guidelines based on feasibility analysis and support internal design teams. Provide complete

application support to customers by providing SI Kits, Timing Budgets and System Design

Application Notes.

PREFERRED EXPERIENCE:

- Education Requirements: MSEE with 5 or BSEE with 7 years experience in high speed

interface design and signal integrity.

- Hands on experience with high speed interfaces (DDR1/2/3, RLDAM II, QDR SRAM,

Flash, USB) implementation and hardware system experience is a must..

- Experience in Serial Interface architecture, protocols, Backplane design/analysis is

preferable.

- System Signal Integrity analysis experience with HSPICE is must and familiarity with tools

such as Agilent ADS, Sigrity Power-SI, Ansoft HFSS, Apache tools.

- Knowledge of IBIS modeling, board & package model extraction, via modeling.

- Proficiency in Electromagnetic, Transmission-line & S-parameters theory and modeling.

- Understanding of signal integrity analysis parameters and evaluate trade-offs between

design parameters to determine an optimum solution space.

- Simulating and analyzing Power distribution network.

- Firmware knowledge and programming skills in Excel, PERL, Verilog and Matlab is

preferred.

- Experience using lab measurement tools such as oscilloscopes, TDR, VNA and software

tools such as Labview, PLTS.

- Strong written and oral communication in Chinese and English with customer service skills

8.
Field Coreware Engineer

JOB DESCRIPTION:

This position will support DDR/DDR2/DDR3, QDR, RLDRAM, and/or NAND Flash memory

Interface IP applications and their future versions. Customer interface. Generate application

notes. Work with development teams to provide customer technical support. Memory Interface

Phy IP customization.

PREFERRED EXPERIENCE:

- Verilog RTL coding, logic simulation, Synsopsys Design Compiler, Synopsys PrimeTime

STA, Good communication skill, Technical writing (Tech Manual, App Notes, Datasheet)

- BSEE or equivalent, and 3 years logic design industrial experiences, preferrable in

DDR/DDR2/DDR3 SDRAM, QDR SRAM, RLDRAM, and/or NAND Flash memory

Interface

9.
Software Quality Assurance(SQA)

Education and Experience Requirements

BS in Electrical Engineering, Computer Science, or Computer Engineering is required with 6+ years of firmware development.

M.S. preferred with 4+ years in software / hardware validation

Knowledge, Skills, and Abilities

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Quick learner with high level of self-motivation and dedication, with ability to deliver high quality products on time

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Meticulous, methodical, uncompromising, and creative in testing

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Experience in software debugging, problem creation and trapping

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Experience in devising testing / validation methodology is strong plus

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Communicate effectively in a team, able to multitask effectively in fast-paced environment.

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Understanding of NAND Flash concepts, knowledge of Flash management techniques, including wear leveling, garbage collection (strong plus).

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Knowledge and hands-on experience with storage protocols is preferred (SAS / SATA)

10.
Firmware Engineer

Education and Experience Requirements

BS in Electrical Engineering, Computer Science, or Computer Engineering is required with 6+ years of firmware development.

M.S. preferred with 4+ years in firmware development.

Knowledge, Skills, and Abilities

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Must demonstrate expertise in design and implementation of event-driven, real time firmware solutions using C/C++ programming

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Must be able to work with ASIC and software engineers in a collaborative environment

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Quick learner with high level of self-motivation and dedication, with ability to deliver high quality products on time

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Must have an excellent computer science background and demonstrated strength in designing efficient embedded firmware for storage or networking products

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Firmware/System debug skills utilizing debugger, protocol analyzer is required

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Good understanding of RTOS concepts including task switching, deadlocks, and resource management issues is required

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High level of skill in problem recreation, trapping and resolution, possess good written and verbal communication skills.

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Communicate effectively in a team, able to multitask effectively in fast-paced environment.

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Understanding of NAND Flash concepts, knowledge of Flash management techniques, including wear leveling, garbage collection (optional but strong plus).

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Knowledge and hands-on experience with storage protocols is preferred (SAS / SATA)

11.
Customer Quality Engineer –Wuxi/Suzhou

Job Description

-Provides quick on-site support on customer quality issues, coordinates evaluations at customer site, follow-up closely until full closure is achieved.
- Provides resolution of customer quality issues through Corrective Action Requests to internal locations and successfully close issues with customers.
- Administers tracking database through prompt entry and closure of customer complaints so as to meet responsiveness goals and provide RMA dispositions.
- Coordinate customer audits/visits to LSI sub cons and drive closure of action items.
- Prepares and submits customer questionnaires, checklists and any other documents pertaining to quality.
- Actively participates in customer DPPM improvement programs through timely data analysis, parts collections and drive internal teams for improvements.
- Possess excellent written and oral communication in English, ability to support customers 24/7.
- Position is in Suzhou/Wuxi

Requirements/Qualifications (Education) :

Bachelor Degree in Engineering with a minimum of 5 years work experience in semiconductor or HDD industry