请帮忙下载以下IEEE论文(timing sign off)

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请帮忙下载以下IEEE论文， 万分感谢！


1)  Pessimism reduction in static timing analysis using interdependent setup
and hold times

Salman, E.; Dasdan, A.; Taraporevala, F.; Kucukcakar, K.; Friedman, E.G.;
Quality Electronic Design, 2006. ISQED '06. 7th International Symposium on
Digital Object Identifier: 10.1109/ISQED.2006.100
Publication Year: 2006 , Page(s): 6 pp. - 164

2)  Effective Corner-Based Techniques for Variation-Aware IC Timing Verification

e Silva, L. G.; Phillips, J.; Silveira, L. M.;
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Volume: 29 , Issue: 1
Digital Object Identifier: 10.1109/TCAD.2009.2034343
Publication Year: 2010 , Page(s): 157 - 162

3) A unified Multi-Corner Multi-Mode static timing analysis engine

Jing-Jia Nian; Shih-Heng Tsai; Chung-Yang Huang;
Design Automation Conference (ASP-DAC), 2010 15th Asia and South Pacific
Digital Object Identifier: 10.1109/ASPDAC.2010.5419804
Publication Year: 2010 , Page(s): 669 - 674

4) Post sign-off leakage power optimization

Abrishami, H.; Jinan Lou; Qin, J.; Froessl, J.; Pedram, M.;
Design Automation Conference (DAC), 2011 48th ACM/EDAC/IEEE
Publication Year: 2011 , Page(s): 453 - 458

5) On generating tests to cover diverse worst-case timing corners

Lee, L.; Wu, S.; Wen, C.H.-P.; Wang, L.-C.;
Defect and Fault Tolerance in VLSI Systems, 2005. DFT 2005. 20th IEEE International Symposium on
Digital Object Identifier: 10.1109/DFTVS.2005.50
Publication Year: 2005 , Page(s): 415 - 423

6) Parametric yield-aware sign-off flow in 65/45nm

Byung-Su Kim; Byoung-Hyun Lee; Hung-Bok Choi; Sun-Ik Heo; Jae-Rim Lee; Yong-Cheul Kim; Chul Rim; Kyu-Myung Choi;
SoC Design Conference, 2008. ISOCC '08. International
Volume: 01
Digital Object Identifier: 10.1109/SOCDC.2008.4815576
Publication Year: 2008 , Page(s): I-74 - I-77

7) The impact of variability on design methodology

Visweswariah, C.;
Integrated Circuit Design and Technology, 2005. ICICDT 2005. 2005 International Conference on
Digital Object Identifier: 10.1109/ICICDT.2005.1502619
Publication Year: 2005

8) Worst-case timing analysis in UDSM era

Ji Yeon An; Taehoon Kim; Hyung Gyun Yang; Young Hwan Kim;
Electrical Engineering/Electronics Computer Telecommunications and Information Technology (ECTI-CON), 2010 International Conference on
Publication Year: 2010 , Page(s): 376 - 379


9) Improved Timing Windows Overlap Check Using Statistical Timing Analysis

Shrivastava, S.; Parameswaran, H.;
VLSI Design (VLSI Design), 2011 24th International Conference on
Digital Object Identifier: 10.1109/VLSID.2011.21
Publication Year: 2011 , Page(s): 70 - 75

10) Determining the Impact of Within-Die Variation on Circuit Timing

Bashir, M.M.; Milor, L.;
Semiconductor Manufacturing, IEEE Transactions on
Volume: 24 , Issue: 3
Digital Object Identifier: 10.1109/TSM.2011.2152865
Publication Year: 2011 , Page(s): 385 - 391

11) Effective Corner-Based Techniques for Variation-Aware IC Timing Verification

e Silva, L. G.; Phillips, J.; Silveira, L. M.;
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Volume: 29 , Issue: 1
Digital Object Identifier: 10.1109/TCAD.2009.2034343
Publication Year: 2010 , Page(s): 157 - 162

12) Timing signoff uncertainty for UDSM SoC design

Hui Fu;
ASIC, 2003. Proceedings. 5th International Conference on
Volume: 1
Digital Object Identifier: 10.1109/ICASIC.2003.1277503
Publication Year: 2003 , Page(s): 113 - 117 Vol.1

13)  An LLC-OCV Methodology for Statistic Timing Analysis

Hong, J.; Huang, K.; Pong, P.; Pan, J.D.; Kang, J.; Wu, K.C.;
VLSI Design, Automation and Test, 2007. VLSI-DAT 2007. International Symposium
on
Digital Object Identifier: 10.1109/VDAT.2007.373199
Publication Year: 2007 , Page(s): 1 - 4

14) Transition-Time-Relation based capture-safety checking for at-speed scan
test generation

Miyase, K.; Wen, X.; Aso, M.; Furukawa, H.; Yamato, Y.; Kajihara, S.;
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011
Publication Year: 2011 , Page(s): 1 - 4

15) How does inversed temperature dependence affect timing sign-off

Wu, S.H.; Tetelbaum, A.; Wang, L.-C.;
Integrated Circuit Design and Technology and Tutorial, 2008. ICICDT 2008. IEEE International Conference on
Digital Object Identifier: 10.1109/ICICDT.2008.4567300
Publication Year: 2008 , Page(s): 297 - 300

yuanfengseu

兄弟，你要的还真多，先给你下两篇，等空了再下。

yuanfengseu

又找了几篇，打了个包，还有的再说啊