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[原创] Structured ASIC: Methodology and comparison

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发表于 2011-10-14 22:12:04 | 显示全部楼层 |阅读模式

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本帖最后由 siroos90 于 2011-10-14 22:13 编辑

As fabrication process technology continues to advance, mask set costs have become prohibitively expensive. Structured ASICs can offer price and performance between ASICs and FPGAs. They are attractive for mid-volume production and offer good intellectual property security. In this paper, a structured ASIC methodology, where 2 metal- and 1 via-mask are customised, is described. The CAD tools are fully compatible with conventional ASIC design flows and a comparison of area and delay performance with ASICs and FPGAs is given. A prototype structured ASIC implementing an LED-backlit LCD controller was fabricated in a 0.13 μm CMOS process. It was verified and power consumption compared with an ASIC design.

Structured ASIC - Methodology and comparison 2010 .PDF (124.02 KB, 下载次数: 52 )
发表于 2011-10-15 09:07:45 | 显示全部楼层
thank you for your sharing
 楼主| 发表于 2011-10-15 19:48:03 | 显示全部楼层
Welcome mate.
发表于 2011-10-17 11:21:15 | 显示全部楼层
下来看看,谢谢。
发表于 2011-10-19 16:24:53 | 显示全部楼层
这是什么咚咚,论文?
发表于 2011-10-19 21:28:50 | 显示全部楼层
2010的,这么新
发表于 2012-1-5 18:25:15 | 显示全部楼层
下来学习学习谢谢分享!
发表于 2012-1-7 15:35:25 | 显示全部楼层
great book!
发表于 2014-2-25 07:21:30 | 显示全部楼层
nice doc
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