Berkeley2004 High-Performance Pipeline AD Converter Design in Deep-Submicro CMOS

qjf2001

2004 Y. Chiu High-Performance Pipeline AD Converter Design in Deep-Submicro CMOS
Chapter 1 Introduction................................................................................ 1
1.1 Wireless Communication ............................................................. 1
1.2 Challenges of Broadband Radio................................................... 3
1.3 CMOS Technology Scaling ......................................................... 5
1.4 A/D Interface ................................................................................ 8
1.5 Research Contribution ................................................................ 10
1.6 Thesis Organization.................................................................... 11
Chapter 2 Pipeline Architecture Power Efficiency................................ 14
2.1 Pipeline ADC Architecture ........................................................ 14
2.2 Power Efficiency under Low Supply Voltage ........................... 17
2.2.1 kT /C Noise...................................................................... 17
2.2.2 Power Consumption of Pipeline ADC.............................. 18
2.3 Stage-Scaling Analysis of Pipeline ADC .................................. 20
2.3.1 Cline-Gray Model ............................................................. 21
2.3.2 Parasitic-Loaded Amplifier Model ................................... 22
2.3.3 Stage-Scaling Analysis Revisited ..................................... 25
2.3.4 Summary............................................................................ 28
2.3.4.1 Speed Factor............................................................. 29
2.3.4.2 Taper Factor ............................................................. 30
Chapter 3 Capacitor Error-Averaging.................................................... 35
3.1 Pipeline ADC Error Mechanism................................................ 36
3.2 Capacitor Matching Accuracy.................................................... 38
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3.3 Precision Conversion Techniques.............................................. 40
3.3.1 Active Capacitor Error-Averaging.................................... 42
3.3.2 Passive Capacitor Error-Averaging – Part I ..................... 44
3.3.3 Passive Capacitor Error-Averaging – Part II.................... 47
3.3.4 Power Efficiency ............................................................... 48
3.3.5 Monte Carlo Simulation.................................................... 49
Appendix
A3.1 MDAC Capacitor Matching.................................................... 52
A3.2 Active CEA.............................................................................. 54
A3.3 Passive CEA (I) ....................................................................... 56
A3.4 Passive CEA (II) ...................................................................... 58
Chapter 4 Prototype Design...................................................................... 62
4.1 Sampling Clock Skew ................................................................ 62
4.2 Amplifier and Sub-ADC Sharing............................................... 64
4.3 Nested CMOS Gain Boosting .................................................... 68
4.4 Discrete-Time Common-Mode Regulation ............................... 69
4.5 Dynamic Comparator ................................................................. 73
4.6 Sampling Switch......................................................................... 74
Appendix
A4.1 Discrete-Time Common-Mode Regulation ............................ 75
Chapter 5 Experimental Results .............................................................. 79
5.1 Static Linearity............................................................................ 80
5.2 Dynamic Linearity...................................................................... 82
5.2.1 SNDR, THD, and SFDR................................................... 82
5.2.2 ADC Performance Sensitivity........................................... 84
Chapter 6 Conclusion ................................................................................ 87

[ 本帖最后由 qjf2001 于 2006-11-11 22:02 编辑 ]

lc13

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偶也看见了!!!

qun

Thanks

semico_ljj

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pedro888

thanks for your information.....
thanks....

kennyg8304

You can download all the thesis/dissertations at this master's website

Avalon

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ntthlman

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cheny1982

cheny1982