AMD-BJ“ASIC Engineer for Chip Integration”

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AMD是一家专注于微处理器设计和生产的跨国公司，总部位于美国加州硅谷内森尼韦尔。AMD为电脑、通信及消费电子市场供应各种集成电路产品，其中包括中央处理器、图形处理器、闪存、芯片组以及其他半导体技术。
简历发送至：glen-china@qq.com
请在发送简历时按以下格式命名邮件标题（应聘岗位+姓名+现任职位），谢谢合作。
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Responsibility:
•        Integrate functional IPs into SoC per architectural requirement.
•        Develop RTL code for macro blocks in Verilog HDL and make sure functional correct and reusable for different configuration.
•        Participate in making functional/technology based chip targets in timing, area, power. Develop timing constraint, power intent spec accordingly.
•        Synthesis and deliver qualified netlist, cowork with PD to settle chip floorplan and achieve timing closure.

Requirement:
•        major in EE, CS or related, Master Degree with 3+ years or Bachelor with 5+ years working experiences in ASIC Company.  
•        familiar with one or more ASIC flows (logic synthesis, STA, formality check, Design for Power ) and usage of related EDA tools.
•        Familiar with script languages ((tcl, perl etc.) in unix/linux.
•        Good written and spoken English.
•        Good communication skills and be able to work both independently and in a team.

lotus6

顶一个！

lotus6

顶一个！

lotus6

周一，继续
顶顶！