帮忙看一下NC Verilog仿真错误，谢谢

micosin

环境：IC5141，IUS56
在NC verilog仿真时出现下面错误提示：
请各位大哥帮忙看看，小弟不胜感激。

TOOL: ncxlmode 05.60-p001: Started on Jul 05, 2011 at 14:00:50 CST
/home/tju/cadence/ius56/tools.lnx86/bin/ncxlmode
+delay_mode_path
+typdelays
-l
simout.tmp
/home/tju/inv_run1/testfixture.template
-f /home/tju/inv_run1/verilog.inpfiles
/home/tju/mycadence/ncsu-cdk-1.5.1/lib/NCSU_Digital_Parts/inv/functional/verilog.v
ihnl/cds0/netlist
+nostdout
+nocopyright
+ncvlogargs+" -neverwarn -nostdout -nocopyright"
+ncelabargs+" -neg_tchk -nonotifier -sdf_NOCheck_celltype -access +r -pulse_e 100 -pulse_r 100 -neverwarn -timescale 1ns/1ns -nostdout -nocopyright"
+ncsimargs+" -neverwarn -nocopyright -gui -input /home/tju/inv_run1/.simTmpNCCmd "
+mpssession+icfb4999
+mpshost+localhost.localdomain
TOOL: ncxlmode 05.60-p001: Exiting on Jul 05, 2011 at 14:00:51 CST (total: 00:00:01)
ncxlmode: *E,SIMERR: Error during Simulation (status 2), exiting.
TOOL: ncxlmode 05.60-p001: Exiting on Jul 05, 2011 at 14:00:51 CST (total: 00:00:01)

liucaojin

额 看不懂