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发表于 2011-9-8 22:16:57
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显示全部楼层
谢谢楼主!
我把目录贴出来,给大家参考一下!
呵呵!
Index
Introduction.
History of Verilog.
Design and Tool Flow.
My First Program in Verilog.
Verilog HDL Syntax and Semantics.
Verilog Gate Level Modeling Tutorial.
Verilog Operators.
Verilog behavioral modeling.
Procedural Timing Controls.
Tasks and Function.
System Tasks and Functions.
Art of writing test benches.
Verilog Tutorial on Modeling Memories and FSM.
Parameterized Modules.
Verilog Synthesis Tutorial.
Verilog PLI Tutorial ? : 20% Complete
What's new in Verilog 2001? : 50% Complete
Verilog Quick Reference.
Verilog in One Day : This tutorial is in bit lighter sense, with humor, So
take it cool and enjoy. |
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