公司最近招后端人员8~10名

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公司主打高端 services ， 现在因项目发展需要，
招后端人员8~10人，在上海工作 ，
有意者请发简历至 galaxy2004@gmail.com


PD design Lead :
Job Description:
•        Responsible for lead a team of 10 physical design engineer and
drive physical design implementation of complex SoCs (Netlist-to-GDSII). Work
on block level or SoC level physical design in 65nm/40nm/28nm technology
•    Be responsible for team day to day operation
•       Provide technical guidance on floorplan, placement, routing,
clock tree synthesis, timing closure, signal integrity fixing, DRC/LVS
Requirements:
•        BS, MS, PhD, in computer engineering or electrical engineering
•        MUST have at least 5 years of experience in physical design
•        Must have experience of successfully tapeout complex chips
•    Must have the experience on team management
•        Hands on experience with tools like ICC (Synopsys), SocEncounter
(Cadence)  or Talus (Magma)
•        Working knowledge of STA(Primetime), power analysis, DRC/LVS a
plus
•        Understanding of deep sub-micron design problems and solutions
(leakage power, signal integrity, DFM etc.)
•        Working knowledge of RTL-to-Netlist such as synthesis, DFT is a
plus but not a requirement
•        Programming experience in Perl/Tcl a big plus


PD design engineer :
Job Description:
•        Responsible for physical design implementation of complex SoCs
(Netlist-to-GDSII). Work on block level or SoC level physical design in
65nm/40nm/28nm technology.
•        Floorplan, placement, routing, clock tree synthesis, timing
closure, signal integrity fixing, DRC/LVS
Requirements:
•        BS, MS, PhD, in computer engineering or electrical engineering
•        MUST have at least 2-3 years of experience in physical design
•        Must have successfully taped out at least one complex chip
•        Hands on experience with tools like ICC (Synopsys), SocEncounter
(Cadence)  or Talus (Magma)
•        Working knowledge of STA(Primetime), power analysis, DRC/LVS a
plus
•        Understanding of deep sub-micron design problems and solutions
(leakage power, signal integrity, DFM etc.)
•        Working knowledge of RTL-to-Netlist such as synt
plus but not a requirement
•        Programming experience in Perl/Tcl a big plus