AMD招聘Design Verification Engineer

woaibenzhan0010

Location: Shanghai
Responsibilities:
.
  Be responsible for developing, maintaining the design verification flow/methodologies
  Function libraries development for achieving the purpose of various IP's verification.
  Support testing and debugging for FPGA and hardware emulation platform
  Apply necessary verification methodologies to ASIC design, such as coverage, assertion, randomization, gatesim etc and achieve the verification goals
  Working as the technical point of contact on the ASIC area.
Requirements:
1. Major in CS or EE and have Master degree or higher
2. Must be proficient in C++ programming and debugging in Linux and Windows platforms. Know well about SW engineering.
3. Be skillful in shell/perl/tcl/Makefile programming in linux OS.
4. Be experienced in various verification methodologies and familiar with corresponding tools.
5. Will be a big plus if having some backgrounds on video encoding/decoding algorithms
6. Should have some FPGA design knowledge and be able to debug RTL codes using corresponding tools
7. Good English hearing, speaking, reading and writing capabilities.
有意者请发简历到Mike.nan@amd.com

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