免费送好书了Step-by-step Functional Verification with SystemVerilog and OVM

viethungic · 发表于 2012-4-12 10:19:06

回复 1# rettylee

其中一个按钮，感谢都没有！非常感谢^^！

viethungic · 发表于 2012-4-12 10:25:20

回复 3# rettylee

how to practice it? who has a simple design ? pls for me a simple design and example sysverilog!

wls501 · 发表于 2012-4-12 11:30:34

好多啊，不错的东西

richardxingxing · 发表于 2012-4-12 14:43:14

多谢楼主共享

zengshijun · 发表于 2012-4-23 22:26:48

henhaodeshu

hhc789 · 发表于 2012-4-24 10:36:28

谢谢了，好东西

feishang2011 · 发表于 2012-4-24 16:13:15

回复 1# rettylee

thanks!

nov833 · 发表于 2012-4-27 00:21:04

小贵！7*3

[资料] 免费送好书了Step-by-step Functional Verification with SystemVerilog and OVM