求助各位大神，一个QUARTUS II运行的VHDL的错误信息

lyqq61262357

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_signed.all;
use ieee.std_logic_arith.all;
entity songer is
       port(clk1mhz:in std_logic;
            mode:in std_logic;
            previous:in std_logic;
            show: out std_logic;
            cat: out std_logic_vector(6 downto 0);
            Nextt:in std_logic;
            Stop:in std_logic;
            Spks: out std_logic;
            play:in std_logic);
end;
architecture one of songer is
component NoteTabs
          port(  clk1:in std_logic;
     mode:in std_logic;
     previous:in std_logic;
     Nextt:in std_logic;
     play:in std_logic;
     random:in std_logic;
     show: out std_logic;
     cat: out std_logic_vector(6 downto 0);
     Toneindex: out integer range 0 to 21);
     
end component;
component ToneTaba
        port(  index:in integer range 0 to 21;
                  caideng: out std_logic_vector(6 downto 0);
                  Tone: out integer range 0 to 16#7FF#);
end component;
component Speakera
     port(  clk:in std_logic;
            Tone:in integer range 0 to 16#7FF#;
            Spks: out std_logic);
end component;
signal Time:std_logic;
variable c:integer range 0 to 124999;
CONSTANT LENGTH: POSITIVE:=8;
CONSTANT TAP1: POSITIVE:=8;
CONSTANT TAP2: POSITIVE:=4;
SIGNAL PRBS:STD_LOGIC;
SIGNAL PRREG:STD_LOGIC_VECTOR(LENGTH DOWNTO 0);
begin
process(clk1mhz)
  begin
   if clk1mhz'event and clk1mhz='1'then
    if c=124999 then
     Time<='1';
     c:=0;
    else
     Time<='0';
     c:=c+1;
    end if;
   end if;
  end process;
process(Time,STOP)
begin
  if STOP='1'then
   prreg<=(others=>'0');
   prreg(0)<='1';
  elsif Time'event and Time='1'then
   prreg<=(prreg((length-1)downto 0)&(prreg(tap1)xor prreg(tap2)));
  end if;
    end process;

prbs<=prreg(length);

u1:NoteTabs port map(clk1=>Time,mode=>mode,show=>show,Toneindex=>index,
      random => PRBS,cat=>cat,play=>play,Nextt=>Nextt,previous=>previous);
u2:ToneTaba port map(index=>Toneindex,Tone=>Tone);
u3:Speakera port map(clk=>clock1mhz,Tone=>Tone,Spks=>Spks);
end;              

错误信息如下：
Error (10482): VHDL error at songer.vhd(77): object "index" is used but not declared                  

lyqq61262357

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lyqq61262357

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lyqq61262357

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gaurson

variable的变量必须在process里定义，这里就是你的c