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本帖最后由 angelweishan 于 2010-6-3 08:30 编辑
LOW-VOLTAGE LOW-POWER CMOS CURRENT CONVEYORS
Giuseppe Ferri
University of L’Aquila‚ Italy and
Nicola C. Guerrini
University of L’Aquila‚ Italy
Amazon
http://www.amazon.com/Low-Voltage-Low-Power-CMOS-Current-Conveyors/dp/1441953639/ref=sr_1_1?ie=UTF8&s=books&qid=1275215837&sr=1-1
Table of Contents
Abstract v
1 INTRODUCTION 1
1.1 The current mode approach: brief history of current conveyors 2
1.1.1The current-mode approach
1.1.2Brief history of first and second current conveyors
1.2 The second generation current conveyor (CCII) as building block
1.2.1 The nullor approach
1.2.2 The feedback approach
1.2.3 A new basic block
2 DESIGN OF CCII TOPOLOGIES
2.1 CCII ideal and real characteristics and equivalent models
2.1.1The ideal current conveyor
2.1.2The real current conveyor
2.2 CCII topologies: circuit schemes and electrical characteristics
2.2.1 Differential pair based CCII
2.3 The CCII: state of the art and future trend
3. CCII LOW VOLTAGE LOW POWER DESIGN AND CHARACTERISTICS
3.1 Design techniques for low voltage low power (LV LP)
3.1.1 LV LP biasing current design
3.2 Low voltage low power CCII design
3.3 Low voltage low power CCIIs
3.4 Offset in current conveyors 93
3.5 Noise in current conveyors 97
3.5.1 Introduction
3.5.2 Noise evaluation in CCIIs
4 EVOLUTION OF LV LP CCII BASIC BUILDING BLOCK 119
4.1 Improvements of the basic CCII 119
4.1.1Dual output CCII (DOCCII) 119
4.1.2 Current gain CCII (CGCCII) 122
4.1.3 Current controlled CCII (CCCII) 124
4.1.4 Third generation CCII (CCIII) 126
4.2 Towards the differential solutions 128
4.2.1 Differential CCII (DCCII)
4.2.2 Differential voltage CCII (DVCCII) 131
4.2.3 Fully differential CCII (FDCCII) 133
4.2.4 Universal CCII (UCCII) 136
5 LV LP CCII APPLICATIONS 139
5.1 Basic applications 139
5.2 Impedance simulators 149
5.2.1 Impedance converters 149
5.2.2 Capacitance multiplication 152
5.2.3 Inductance simulation 154
5.3 CCII-based filters 161
5.4 Oscillators 176
5.5 CCII Applications 186
5.5.1 Current conveyor with reduced parasitic impedance 186
5.5.2 DCCII-based four quadrant multiplier 187
5.5.3 Sensor interface 188
Appendix A I
Appendix B V
Appendix C XXIII |
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发表于 2010-5-30 18:32:15
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