ESD in layout

longgangtou · 发表于 2007-1-12 14:54:01

谢谢~~

gogoll681 · 发表于 2007-1-12 16:22:02

下来看看，先谢谢了

cheny1982 · 发表于 2007-1-12 22:06:18

zhanweisu27 · 发表于 2007-1-12 22:28:57

ESD对Layout要求比较高啊

semico_ljj · 发表于 2007-1-15 10:08:35

Design and Layout of a High ESD Performance NPN Structure for
Submicron BiCMOS/Bipolar Circuits

semico_ljj · 发表于 2007-1-15 10:09:25

Abstract --- This paper presents a high ESD
performance NPN protection structure for advanced
submicron BiCMOS and Bipolar processes. Using a
zener trigger circuit and a specific multi-emitter
layout technique, this paper successfully
demonstrates an optimal protection structure to meet
the requirements imposed on advanced submicron
circuit applications. The protection circuit has a low
trigger voltage as well as a low capacitance load and
does not add any series resistance.

飞雪 · 发表于 2007-1-17 10:16:36

xiexie!

飞雪 · 发表于 2007-1-18 12:07:32

xiexie!

yhy0379 · 发表于 2007-1-27 11:44:52

haohaoahao

cheny1982 · 发表于 2007-1-27 19:11:49

ESD in layout

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