IEEE --Low-Voltage CMOS Analog Bootstrapped Switch

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Low-Voltage CMOS Analog Bootstrapped Switch For
Sample-and-Hold Circuit: Design and Chip Characterization

This paper presents the design and characterization
of a sample-and-hold circuit based on a novel implementation
of the bootstrapped low-voltage analog CMOS switch. The
heart of this circuit is a new low-voltage and low-stress CMOS
clock voltage doubler. Through the use of a dummy switch, the
charge injection induced by the bootstrapped switch is greatly
reduced, resulting in improved sample-and-hold accuracy.
Experimental results in a 0.18 μm digital CMOS process show
that a resolution greater than 10 bits can be obtained with a 1.0
V supply voltage. Circuit operation is also possible for supply
voltages close to transistor threshold (e.g., 0.65 V).

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jackal0716

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jackal0716

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