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新书!The gm/ID Methodology, a sizing tool for low-voltage analog CMOS Circuits

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发表于 2009-12-5 09:20:57 | 显示全部楼层 |阅读模式

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[size=120%]The gm/ID Methodology, a sizing tool for low-voltage analog CMOS Circuits: The semi-empirical and compact model approaches (Analog Circuits and Signal Processing)
By Paul G.A. Jespers



  • Publisher:   Springer
  • Number Of Pages:   225
  • Publication Date:   2009-12
  • ISBN-10 / ASIN:   0387471006
  • ISBN-13 / EAN:   9780387471006


Product Description:


In "The gm/ID Methodology, a Sizing Tool for Low-Voltage Analog CMOS Circuits", we compare the semi-empirical to the compact model approach. Small numbers of parameters make the compact model attractive for the model paves the way towards analytic expressions unaffordable otherwise. The E.K.V model is a good candidate, but when it comes to short channel devices, compact models are either inaccurate or loose straightforwardness. Because sizing requires basically a reliable large signal representation of MOS transistors, we investigate the potential of the E.K.V model when its parameters are supposed to be bias dependent. The model-driven and semi-empirical methods are compared considering the Intrinsic Gain Stage and a few more complex circuits. A series of MATLAB files contained in the CD-ROM allow redoing the tests.

The gm_ID Methodology, a sizing tool for low-voltage analog CMOS Circuits.rar

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发表于 2009-12-5 09:25:49 | 显示全部楼层
很好,谢谢,顶一个
发表于 2009-12-5 09:26:51 | 显示全部楼层
thanks for sharing
发表于 2009-12-5 09:27:18 | 显示全部楼层
我也加入模拟大军了 哈哈 从头学起
发表于 2009-12-5 10:06:39 | 显示全部楼层
楼主威武
发表于 2009-12-5 10:55:57 | 显示全部楼层
bucuo1111
发表于 2009-12-5 11:05:36 | 显示全部楼层
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发表于 2009-12-5 12:30:34 | 显示全部楼层
gm/ID, 不错的设计方法
发表于 2009-12-5 12:32:34 | 显示全部楼层
bu cuo bu cuo
发表于 2009-12-5 13:27:27 | 显示全部楼层
thank you very much!
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