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资料简介:
Design of ESD Power Protection With Diode Structures for Mixed-Power Supply Systems
Abstract—The coupling noise immune electrostatic discharge
(ESD) protection network is becoming a critical design requirement
for preserving the performance of high-speed analog circuits.
In this paper, we present a noise-aware design of ESD power
protection with diode structures in highly integrated high-speed
CMOS ICs. We thoroughly characterize the noise coupled from
the ESD power protection network and experimentally verify its
generation and impact on the performance of analog circuitry
being protected. A noise-aware design technique is proposed to
achieve superior noise isolation while improving ESD reliability.
The estimation of peak overvoltage on power/ground busses in
digital circuits adaptively finds the optimum feature of protection
circuits subject to noise constraints. The design is validated with
measurements from a test chip fabricated in a 0.18- m CMOS
technology.
Index Terms—Coupling noise, electrostatic discharge (ESD),
ESD power protection, phase-locked loops, protection diodes.
[ 本帖最后由 teradyne 于 2006-7-2 09:24 编辑 ] |
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